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Re: SPARC extended inline assembly and register constraints


Thanks Ian,

I actually already know about this construct. I was just wondering whether it is possible to let the compiler choose between one of the output registers just by placing an appropriate constraint as the argument of the asm statement. 
But after digging a bit into the various manuals and howtos and receiving your answer, I should conclude that there is no way.

Thank you anyway,
J.

--- On Tue, 11/30/10, Ian Lance Taylor <iant@google.com> wrote:

> From: Ian Lance Taylor <iant@google.com>
> Subject: Re: SPARC extended inline assembly and register constraints
> To: "Josef Ahmad" <josef_ahm@yahoo.com>
> Cc: gcc-help@gcc.gnu.org
> Date: Tuesday, November 30, 2010, 7:00 PM
> Josef Ahmad <josef_ahm@yahoo.com>
> writes:
> 
> > I would appreciate if somebody knows whether there is
> a way to specify, through the gcc extended inline assembly
> construct, a precise kind of registers. 
> > To be more specific, I would like to indicate that the
> given instruction operand must be a SPARC output register.
> >
> > e.g.
> >
> > int var;
> > asm volatile("instructionname %1" 
> >? ???: /* no output */ 
> >? ???: "xxx"(var)
> >? ???: /* no clobbered regs */
> >? ???);
> >
> > In this case, I would like to find, if existing, the
> right constraint to use instead of xxx to ask the compiler
> to pick one of the o0 - o7 registers.
> >
> > I state beforehand that I have read the related gcc
> documentation, unfortunately without finding anything
> related to my question. I think that gcc focuses strictly on
> the SPARC ABI compliance rather than allowing a wide range
> of customization to the inline assembly, but I hope I am
> wrong and there is a possibility to do this trick.
> 
> Use asm ("REGNAME") with var, e.g.,
> 
> ? int var asm ("%o0");
> 
> Then use a constraint which permits %o0, such as simply
> "r".
> 
> Ian
> 



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