This is the mail archive of the gcc-help@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Why won't gcc-arm allow "eorc" in assembly?


Hello,

I'm writing a small low-level routine using inline ARM assembly. The following gives me trouble:

#include <stdint.h>
uint64_t foo(uint64_t a)
{
    asm ("adds %0,%0,%0\n\t"
         "adcs %H0,%H0,%H0\n\t"
         "eorc %0,#0x51\n\t"
         "eorcs %H0,#0x80000000"
    : "+r"(a) : : "cc");
    return a;
}

thecus> gcc-4.4 test.c -march=armv5te -O2 -c
/tmp/cc1CraGk.s: Assembler messages:
/tmp/cc1CraGk.s:28: Error: bad instruction `eorc r3,#0x51'

If I use eorcs or eor instead of eorc then there is no complier complaint, but I need both eor's to be conditional on the same carry flag (from adcs) so cannot use 's' in the first eor case.

Why won't gcc (or is it gas) let me use eorc? It is a legitimate opcode for ARM, as far as I can tell.

This happens on both gcc 4.3 and 4.4.

Thank you,
Ted Krovetz


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]