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Re: insn does not satisfy its constraints
On Fri, Oct 05, 2007 at 11:43:56AM +0200, Boris Boesler wrote:
> In .greg:
>
> Reload 0: reload_in (SI) = (reg/f:SI 0 R0 [102])
> Ax_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 1)
> reload_in_reg: (reg/f:SI 0 R0 [102])
> reload_reg_rtx: (reg:SI 2 R2)
>
> *** R0 and R2 are not in register set Ax!
[snip]
> ;; Register dispositions:
> 101 in 1 102 in 0 103 in 0
>
> ;; Hard regs used: 0 1 2 34 46 66
>
> *** 66? This is impossible!! There is no register set that contains
> that register!
Stack, frame or argument pointer?
> Is there a problem with my register set definition?
>
> #define REG_CLASS_CONTENTS {\
> { 0x00000000 ,0x00000000 ,0x00000000 } /* NO_regs */ \
> ,{ 0xffffffff ,0x00000000 ,0x00000000 } /* Rx */ \
> ,{ 0x00000000 ,0x00001fff ,0x00000000 } /* Ax */ \
> ,{ 0x00000000 ,0x00000000 ,0x00000000 } /* SBx */ \
> ,{ 0x00000000 ,0x00000000 ,0x00000000 } /* Bx */ \
> ,{ 0x00000000 ,0x00000000 ,0x00000000 } /* SIx */ \
> ,{ 0x00000000 ,0x00000000 ,0x00000000 } /* IBx */ \
> ,{ 0xffffffff ,0x0000ffff ,0x00000000 } /* GENERAL */ \
> ,{ 0xffffffff ,0x0000ffff ,0x00000000 } /* ALL */ \
> }
You should have a class which is the union of the Rx and Ax classes,
placed somewhere between Ax and GENERAL. If you have instructions which take
both Rx and Ax, define a constraint for this new class.
Is your REGNO_REG_CLASS() correct?
> (insn 7 5 21 3 (set (reg/f:SI 0 R0 [102])
> (symbol_ref:SI ("a") <var_decl 0x41695360 a>)) 79 {movsi} (nil)
> (nil))
>
> (insn 21 7 8 3 (set (reg:SI 2 R2)
> (reg/f:SI 0 R0 [102])) 79 {movsi} (nil)
> (nil))
>
> *** Why was this movsi instruction (insn 21) inserted? It should move
> R0 to an address register.
The reload pass inserted insn 21 (this is the "Reload 0" above) before
insn 8 because it found that register R0 was no good for the address in insn
8. Unfortunately, it picked R2 which isn't any good either.
> There seems to be a problem with my mov<mode> instruction?
>
> (define_insn "mov<mode>"
> [(set (match_operand:ALLMT 0 "nonimmediate_operand" "=Rx, Ax, Rx,
> Ax, r, m, r")
> (match_operand:ALLMT 1 "general_operand" " Rx, Ax, Ax, Rx,
> <iF>, r, m"))]
>
> Might be sub-optimal, but ok.
Replace the first four alternatives with just one using the combined
Rx+Ax class from above. Better yet, since the fifth alternative r->r should
cover it and the instruction is the same, try deleting the first four
alternatives.
What is your REGISTER_MOVE_COST? Just wondering.
--
Rask Ingemann Lambertsen
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