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Re: GCC asm block optimizations on x86_64
- From: Rask Ingemann Lambertsen <rask at sygehus dot dk>
- To: "Darryl L. Miles" <darryl-mailinglists at netbauds dot net>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Wed, 29 Aug 2007 18:13:02 +0200
- Subject: Re: GCC asm block optimizations on x86_64
- References: <46D25CE8.1070206@netbauds.net>
On Mon, Aug 27, 2007 at 06:11:04AM +0100, Darryl L. Miles wrote:
> #define U64_DIVIDE_ASM(quotient, remainder, dividend, divisor, overflow) do { \
> __asm__ __volatile__( \
> "\n\t" \
> "xorl %0,%0\n\t" \
> "divq %5\n\t" \
> \
> "jnc 1f\n\t" \
> "incl %0\n" \
> "1:\n\t" \
> "movq %%rax,%2\n\t" \
> "movq %%rdx,%1\n\t" \
> : "=&g" (overflow), /* return */ \
> "=g" (*remainder), \
> "=g" (*quotient) \
> : "d" (0), /* argument */ \
> "a" ((*dividend)), \
> "g" ((*divisor)) \
> /*: "rax", "rdx", you'd think you need this to */ \
> /* describe these registers as no longer containing */ \
> /* the assigned input values after asm block */ \
> /* execution, but will not compile witht them set. */ \
I think you want
: "=&r" (overflow), /* return */
"=d" (*remainder),
"=a" (*quotient)
: "1" (0), /* argument */
"2" (*dividend),
"rm" (*divisor)
so the compiler knows that %rax and %rdx are modified.
--
Rask Ingemann Lambertsen