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Re: GCC problems with Altivec / PowerPC
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Przemyslaw Iskra <sparky at pld-linux dot org>
- Cc: gcc-help at gcc dot gnu dot org
- Date: Tue, 03 Jul 2007 17:40:21 -0400
- Subject: Re: GCC problems with Altivec / PowerPC
- References: <20070614190100.GA28453@pld-linux.org>
As a workaround I tried to use inline assembly for loads and stores:
#define asm_lvx( vec, idx, ptr ) \
asm ( "lvx %0,%1,%2" \
: "=v" (vec) \
: "r" (idx), "r" (ptr)
)
But there's a problem, in lvx/stvx '0' in second term acts as
literal 0, not as register number. Shouldn't gcc be able to
understand those instructions and not use r0 ?
Constraint letter "r" means any GPR. If you are going to create the
address manually, you explicitly need to tell GCC only to use a base
register by using constraint letter "b".
The extra stack manipulation is a known problem.
For the memcpy look, open a Bugzilla.
David