Re: GCC for hardware design?

[Andy Freeman <anamax at earthlink dot net>]

In article <38188220@news.ecs.soton.ac.uk> "Pieter Hartel"
<phh@ecs.soton.ac.uk> wrote:
> Has anyone considered, worked on, abandoned or completed
> a code generator for GCC to some low level hardware
> description language, so that one could use C/C++ for hardware
design?

A number of companies have products which turn C/C++ into
synthesizable Verilog/VHDL.  I doubt that they're GCC based,
but I don't see why that matters (from a technical sense -
none of these products are open source).

I recently summarized these efforts in a posting in comp.lang.verilog.
They fall into three categories.

Category (1) is "Verilog in C", that is, tools which support
verilog-like semantics (the event queue) in C/C++ via class
libraries.  Synopsys' Scenic and Cynapps.com are in this category.
Category (1) tools are distinguished by user-guides which
mention the event queue, an execution mechanism, and non-blocking
assignments.  They often require that the programmer specify
parallelism explicitly.

Category (2) extends C/C++ with some other mechanism.  Estrel
C and Handel-C are my favorite examples.  Handel-C uses CSP
and Estrel has a similar handicap.  (Don't get me wrong - CSP
is elegant and I like it the problem is that it's irrelevant.)

Category (3) compiles programs written in a carefully chosen
C/C++ subset into synthesizable Verilog.  Category (3) tools
do not have special execution mechanisms, an event queue, or
programmer-specified parallelism.  CLevelDesign has tools
in this area.  (I'm working on a competitor to their RTL-C
product.)

Category (1) and (3) tools do not require special C/C++ compilers
if you want to run the model as an ordinary program.  Category (2)
tools do - the languages aren't really C, they just look somewhat
like it.

Category (1) tools seem to be aimed at Verilog programmers.
They promise some additional simulation speed and a better
interface with a world modelled in C/C++.

Category (3) tools are aimed at C programmers who'd like
to design hardware.  I've seen unbelievable designer
productivity using these tools and the simulation speeds
are very impressive.

I don't think that category (2) tools have enough potential
users and they don't seem to offer any compelling advantages
which will change that.

-andy


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