[gcc(refs/users/meissner/heads/work112)] Make load/cmp fusion know about prefixed loads.

[Michael Meissner]

https://gcc.gnu.org/g:fd30edf2aef1285fa45176dce8d0e3ace90b929f

commit fd30edf2aef1285fa45176dce8d0e3ace90b929f
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Mar 21 00:35:50 2023 -0400

    Make load/cmp fusion know about prefixed loads.
    
    The issue with the bug is the power10 load GPR + cmpi -1/0/1 fusion
    optimization generates illegal assembler code.
    
    Ultimately the code was dying because the fusion load + compare -1/0/1 patterns
    did not handle the possibility that the load might be prefixed.
    
    The main cause is the prefixed attribute did not consider that fused_load_cmpi
    insns are essentially load instructions, and to check whether the load is
    prefixed.
    
    This code ensures that the prefixed attribute is correctly set for the fusion
    load plus compare immediate insns combined instruction.  This means it will
    split the insn before final is called, and the load instruction will use a
    prefixed load.
    
    The original patch by Aaron reworked the insns generated by genfusion.pl so
    that they had constraints that limited the load to be YZ, which are constraints
    that restrict the load to offsets that the non-prefixed LWA instruction can
    handle.  I will submit that patch as a second patch.  However, just setting the
    prefixed attribute correctly will correctly split the insns.
    
    2023-03-21   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            PR target/105325
            * gcc/config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Improve generation
            of the ld and lwa instructions which use the DS encoding instead of D.
            Use the YZ constraint for these loads.  Handle prefixed loads better.
            Set the sign_extend attribute as appropriate.
            * gcc/config/rs6000/fusion.md: Regenerate.
            * gcc/config/rs6000/rs6000.md (prefixed attribute): Add fused_load_cmpi
            instructions to the list of instructions that might have a prefixed load
            instruction.
    
    gcc/testsuite/
    
            PR target/105325
            * g++.target/powerpc/pr105325.C: New test.
            * gcc.target/powerpc/fusion-p10-ldcmpi.c: Adjust insn counts.

Diff:
---
 gcc/config/rs6000/rs6000.md                 |  2 +-
 gcc/testsuite/g++.target/powerpc/pr105325.C | 24 ++++++++++++++++++++++++
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 81bffb04ceb..0f809c3793f 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -302,7 +302,7 @@
 	      (eq_attr "maybe_prefixed" "no"))
 	 (const_string "no")
 
-	 (eq_attr "type" "load,fpload,vecload")
+	 (eq_attr "type" "load,fpload,vecload,vecload,fused_load_cmpi")
 	 (if_then_else (match_test "prefixed_load_p (insn)")
 		       (const_string "yes")
 		       (const_string "no"))
diff --git a/gcc/testsuite/g++.target/powerpc/pr105325.C b/gcc/testsuite/g++.target/powerpc/pr105325.C
new file mode 100644
index 00000000000..f4ab384daa7
--- /dev/null
+++ b/gcc/testsuite/g++.target/powerpc/pr105325.C
@@ -0,0 +1,24 @@
+/* { dg-do assemble } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-require-effective-target powerpc_prefixed_addr } */
+/* { dg-options "-O2 -mdejagnu-cpu=power10 -fstack-protector" } */
+
+/* Test that power10 fusion does not generate an LWA/CMPDI instruction pair
+   instead of PLWZ/CMPWI.  Ultimately the code was dying because the fusion
+   load + compare -1/0/1 patterns did not handle the possibility that the load
+   might be prefixed.  */
+
+struct Ath__array1D {
+  int _current;
+  int getCnt() { return _current; }
+};
+struct extMeasure {
+  int _mapTable[10000];
+  Ath__array1D _metRCTable;
+};
+void measureRC() {
+  extMeasure m;
+  for (; m._metRCTable.getCnt();)
+    for (;;)
+      ;
+}