[gcc(refs/users/meissner/heads/dmf009)] Revert patches
Michael Meissner
meissner@gcc.gnu.org
Thu Mar 2 23:48:39 GMT 2023
https://gcc.gnu.org/g:f6abe0be8958d3aacf080037613682924f188a18
commit f6abe0be8958d3aacf080037613682924f188a18
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Mar 2 18:48:36 2023 -0500
Revert patches
Diff:
---
gcc/config/rs6000/rs6000.md | 52 ---------------------------------------------
1 file changed, 52 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index d23045590c7..ddb8a6abfca 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -996,58 +996,6 @@
(set_attr "dot" "yes")
(set_attr "length" "4,8")])
-(define_insn_and_split "zero_extendditi2"
- [(set (match_operand:TI 0 "gpc_reg_operand" "=r,r,wa,wa,wa")
- (zero_extend:TI
- (match_operand:DI 1 "reg_or_mem_operand" "r,m,b,Z,wa")))
- (clobber (match_scratch:DI 2 "=&X,X,X,X,wa"))]
- "TARGET_POWERPC64 && TARGET_P9_VECTOR"
- "@
- #
- #
- mtvsrdd %x0,0,%1
- lxvrdx %x0,%y1
- #"
- "&& reload_completed
- && (int_reg_operand (operands[0], TImode)
- || (vsx_register_operand (operands[0], TImode)
- && vsx_register_operand (operands[1], DImode)))"
- [(set (match_dup 2) (match_dup 1))
- (set (match_dup 3) (const_int 0))]
-{
- rtx dest = operands[0];
- rtx src = operands[1];
-
- /* If we are converting a VSX DImode to VSX TImode, we need to move the upper
- 64-bits (DImode) to the lower 64-bits. We can't just do a xxpermdi
- instruction to swap the two 64-bit words, because can't rely on the bottom
- 64-bits of the VSX register being 0. Instead we create a 0 and do the
- xxpermdi operation to combine the two registers. */
- if (vsx_register_operand (dest, TImode)
- && vsx_register_operand (src, DImode))
- {
- rtx tmp = operands[2];
- emit_move_insn (tmp, const0_rtx);
-
- rtx hi = tmp;
- rtx lo = src;
- if (!BYTES_BIG_ENDIAN)
- std::swap (hi, lo);
-
- rtx dest_v2di = gen_rtx_REG (V2DImode, reg_or_subregno (dest));
- emit_insn (gen_vsx_concat_v2di (dest_v2di, hi, lo));
- DONE;
- }
-
- /* If we are zero extending to a GPR register either from a GPR register,
- a VSX register or from memory, do the zero extend operation to the
- lower DI register, and set the upper DI register to 0. */
- operands[2] = gen_lowpart (DImode, dest);
- operands[3] = gen_highpart (DImode, dest);
-}
- [(set_attr "type" "*,load,vecexts,vecload,vecperm")
- (set_attr "isa" "*,*,p9v,p10,*")
- (set_attr "length" "8,8,*,*,8")])
(define_insn "extendqi<mode>2"
[(set (match_operand:EXTQI 0 "gpc_reg_operand" "=r,?*v")
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