[gcc r14-6330] Revert "arm: vst1q_types_x4 ACLE intrinsics"
Richard Earnshaw
rearnsha@gcc.gnu.org
Fri Dec 8 16:07:48 GMT 2023
https://gcc.gnu.org/g:59f77a89712a927975475754e2e7a27d8c09cb11
commit r14-6330-g59f77a89712a927975475754e2e7a27d8c09cb11
Author: Richard Earnshaw <rearnsha@arm.com>
Date: Fri Dec 8 16:04:17 2023 +0000
Revert "arm: vst1q_types_x4 ACLE intrinsics"
This reverts commit 4ad77f883c178679f1dbb3a5603f811e022080bb.
Diff:
---
gcc/config/arm/arm_neon.h | 114 ---------------------
gcc/config/arm/arm_neon_builtins.def | 1 -
gcc/config/arm/neon.md | 26 -----
.../gcc.target/arm/simd/vst1q_base_xN_1.c | 59 -----------
.../gcc.target/arm/simd/vst1q_bf16_xN_1.c | 8 +-
.../gcc.target/arm/simd/vst1q_fp16_xN_1.c | 6 --
gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c | 6 --
7 files changed, 1 insertion(+), 219 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index af1f747f262..5cec7dd876f 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -11391,38 +11391,6 @@ vst1q_s64_x3 (int64_t * __a, int64x2x3_t __b)
__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_s8_x4 (int8_t * __a, int8x16x4_t __b)
-{
- union { int8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_s16_x4 (int16_t * __a, int16x8x4_t __b)
-{
- union { int16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_s32_x4 (int32_t * __a, int32x4x4_t __b)
-{
- union { int32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v4si ((__builtin_neon_si *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_s64_x4 (int64_t * __a, int64x2x4_t __b)
-{
- union { int64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1_s8_x3 (int8_t * __a, int8x8x3_t __b)
@@ -11768,14 +11736,6 @@ vst1q_p64_x3 (poly64_t * __a, poly64x2x3_t __b)
__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_p64_x4 (poly64_t * __a, poly64x2x4_t __b)
-{
- union { poly64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
-}
-
#pragma GCC pop_options
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
@@ -11857,24 +11817,6 @@ vst1q_f32_x3 (float32_t * __a, float32x4x3_t __b)
__builtin_neon_vst1q_x3v4sf (__a, __bu.__o);
}
-#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_f16_x4 (float16_t * __a, float16x8x4_t __b)
-{
- union { float16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v8hf (__a, __bu.__o);
-}
-#endif
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_f32_x4 (float32_t * __a, float32x4x4_t __b)
-{
- union { float32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v4sf (__a, __bu.__o);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1q_u8 (uint8_t * __a, uint8x16_t __b)
@@ -11967,38 +11909,6 @@ vst1q_u64_x3 (uint64_t * __a, uint64x2x3_t __b)
__builtin_neon_vst1q_x3v2di ((__builtin_neon_di *) __a, __bu.__o);
}
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_u8_x4 (uint8_t * __a, uint8x16x4_t __b)
-{
- union { uint8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_u16_x4 (uint16_t * __a, uint16x8x4_t __b)
-{
- union { uint16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_u32_x4 (uint32_t * __a, uint32x4x4_t __b)
-{
- union { uint32x4x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v4si ((__builtin_neon_si *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_u64_x4 (uint64_t * __a, uint64x2x4_t __b)
-{
- union { uint64x2x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v2di ((__builtin_neon_di *) __a, __bu.__o);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1q_p8 (poly8_t * __a, poly8x16_t __b)
@@ -12045,22 +11955,6 @@ vst1q_p16_x3 (poly16_t * __a, poly16x8x3_t __b)
__builtin_neon_vst1q_x3v8hi ((__builtin_neon_hi *) __a, __bu.__o);
}
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_p8_x4 (poly8_t * __a, poly8x16x4_t __b)
-{
- union { poly8x16x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v16qi ((__builtin_neon_qi *) __a, __bu.__o);
-}
-
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_p16_x4 (poly16_t * __a, poly16x8x4_t __b)
-{
- union { poly16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v8hi ((__builtin_neon_hi *) __a, __bu.__o);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst1_lane_s8 (int8_t * __a, int8x8_t __b, const int __c)
@@ -20753,14 +20647,6 @@ vst1q_bf16_x3 (bfloat16_t * __a, bfloat16x8x3_t __b)
__builtin_neon_vst1q_x3v8bf (__a, __bu.__o);
}
-__extension__ extern __inline void
-__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vst1q_bf16_x4 (bfloat16_t * __a, bfloat16x8x4_t __b)
-{
- union { bfloat16x8x4_t __i; __builtin_neon_xi __o; } __bu = { __b };
- __builtin_neon_vst1q_x4v8bf (__a, __bu.__o);
-}
-
__extension__ extern __inline void
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
vst2_bf16 (bfloat16_t * __ptr, bfloat16x4x2_t __val)
diff --git a/gcc/config/arm/arm_neon_builtins.def b/gcc/config/arm/arm_neon_builtins.def
index 55e09722748..cc014f9b89e 100644
--- a/gcc/config/arm/arm_neon_builtins.def
+++ b/gcc/config/arm/arm_neon_builtins.def
@@ -316,7 +316,6 @@ VAR7 (STORE1, vst1q_x2, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf)
VAR7 (STORE1, vst1_x3, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
VAR7 (STORE1, vst1q_x3, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf)
VAR7 (STORE1, vst1_x4, v8qi, v4hi, v2si, di, v4hf, v2sf, v4bf)
-VAR7 (STORE1, vst1q_x4, v16qi, v8hi, v4si, v2di, v8hf, v4sf, v8bf)
VAR14 (STORE1LANE, vst1_lane,
v8qi, v4hi, v4hf, v2si, v2sf, di, v16qi, v8hi, v8hf, v4si, v4sf, v2di, v4bf, v8bf)
VAR13 (LOAD1, vld2,
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md
index e069ceb651c..010cc579f23 100644
--- a/gcc/config/arm/neon.md
+++ b/gcc/config/arm/neon.md
@@ -5169,32 +5169,6 @@ if (BYTES_BIG_ENDIAN)
[(set_attr "type" "neon_store1_3reg<q>")]
)
-(define_insn "neon_vst1q_x4<mode>"
- [(set (match_operand:XI 0 "neon_struct_operand" "=Um")
- (unspec:XI [(match_operand:XI 1 "s_register_operand" "w")
- (unspec:VDQX [(const_int 0)] UNSPEC_VSTRUCTDUMMY)]
- UNSPEC_VST1))]
- "TARGET_NEON"
-{
- int regno = REGNO (operands[1]);
- rtx ops[5];
- ops[0] = operands[0];
- ops[1] = gen_rtx_REG (DImode, regno);
- ops[2] = gen_rtx_REG (DImode, regno + 2);
- ops[3] = gen_rtx_REG (DImode, regno + 4);
- ops[4] = gen_rtx_REG (DImode, regno + 6);
- output_asm_insn ("vst1.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
-
- ops[1] = gen_rtx_REG (DImode, regno + 8);
- ops[2] = gen_rtx_REG (DImode, regno + 10);
- ops[3] = gen_rtx_REG (DImode, regno + 12);
- ops[4] = gen_rtx_REG (DImode, regno + 14);
- output_asm_insn ("vst1.<V_sz_elem>\t{%P1, %P2, %P3, %P4}, %A0", ops);
- return "";
-}
- [(set_attr "type" "neon_store1_4reg<q>")]
-)
-
(define_insn "neon_vst1_x4<mode>"
[(set (match_operand:OI 0 "neon_struct_operand" "=Um")
(unspec:OI [(match_operand:OI 1 "s_register_operand" "w")
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
index 5a639560de6..838da09fee7 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_base_xN_1.c
@@ -115,74 +115,15 @@ void test_vst1q_p16_x3 (poly16_t * ptr, poly16x8x3_t val)
vst1q_p16_x3 (ptr, val);
}
-void test_vst1q_u8_x4 (uint8_t * ptr, uint8x16x4_t val)
-{
- vst1q_u8_x4 (ptr, val);
-}
-
-void test_vst1q_u16_x4 (uint16_t * ptr, uint16x8x4_t val)
-{
- vst1q_u16_x4 (ptr, val);
-}
-
-void test_vst1q_u32_x4 (uint32_t * ptr, uint32x4x4_t val)
-{
- vst1q_u32_x4 (ptr, val);
-}
-
-void test_vst1q_u64_x4 (uint64_t * ptr, uint64x2x4_t val)
-{
- vst1q_u64_x4 (ptr, val);
-}
-
-void test_vst1q_s8_x4 (int8_t * ptr, int8x16x4_t val)
-{
- vst1q_s8_x4 (ptr, val);
-}
-
-void test_vst1q_s16_x4 (int16_t * ptr, int16x8x4_t val)
-{
- vst1q_s16_x4 (ptr, val);
-}
-
-void test_vst1q_s32_x4 (int32_t * ptr, int32x4x4_t val)
-{
- vst1q_s32_x4 (ptr, val);
-}
-
-void test_vst1q_s64_x4 (int64_t * ptr, int64x2x4_t val)
-{
- vst1q_s64_x4 (ptr, val);
-}
-
-void test_vst1q_f32_x4 (float32_t * ptr, float32x4x4_t val)
-{
- vst1q_f32_x4 (ptr, val);
-}
-
-void test_vst1q_p8_x4 (poly8_t * ptr, poly8x16x4_t val)
-{
- vst1q_p8_x4 (ptr, val);
-}
-
-void test_vst1q_p16_x4 (poly16_t * ptr, poly16x8x4_t val)
-{
- vst1q_p16_x4 (ptr, val);
-}
-
/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.8\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 3 } } */
/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
-/* { dg-final { scan-assembler-times {vst1.32\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 6 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 4 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
index 84fa8509db8..2593c31c756 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_bf16_xN_1.c
@@ -15,11 +15,5 @@ void test_vst1q_bf16_x3 (bfloat16_t * ptr, bfloat16x8x3_t val)
vst1q_bf16_x3 (ptr, val);
}
-void test_vst1q_bf16_x4 (bfloat16_t * ptr, bfloat16x8x4_t val)
-{
- vst1q_bf16_x4 (ptr, val);
-}
-
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
\ No newline at end of file
+/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
\ No newline at end of file
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
index 5b13edf9998..28e949b557a 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_fp16_xN_1.c
@@ -15,11 +15,5 @@ void test_vst1q_f16_x3 (float16_t * ptr, float16x8x3_t val)
vst1q_f16_x3 (ptr, val);
}
-void test_vst1q_f16_x4 (float16_t * ptr, float16x8x4_t val)
-{
- vst1q_f16_x4 (ptr, val);
-}
-
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+\]\n} 1 } } */
/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.16\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+\]\n} 2 } } */
diff --git a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
index f49917d5ec8..7878d936b9f 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vst1q_p64_xN_1.c
@@ -15,11 +15,5 @@ void test_vst1q_p64_x3 (poly64_t * ptr, poly64x2x3_t val)
vst1q_p64_x3 (ptr, val);
}
-void test_vst1q_p64_x4 (poly64_t * ptr, poly64x2x4_t val)
-{
- vst1q_p64_x4 (ptr, val);
-}
-
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+-d[0-9]+\}, \[r[0-9]+:64\]\n} 1 } } */
/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
-/* { dg-final { scan-assembler-times {vst1.64\t\{d[0-9]+, d[0-9]+, d[0-9]+, d[0-9]+\}, \[r[0-9]+:64\]\n} 2 } } */
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