[gcc(refs/vendors/ARM/heads/arm-9-branch)] Backport fix for PR89245

Joey Ye jye2@gcc.gnu.org
Thu Feb 27 10:08:00 GMT 2020


https://gcc.gnu.org/g:77b90e2fecdb518816d0dffacb8167978ed27973

commit 77b90e2fecdb518816d0dffacb8167978ed27973
Author: Dragan Mladjenovic <dmladjenovic@wavecomp.com>
Date:   Wed Oct 30 15:12:05 2019 +0000

    Backport fix for PR89245
    
    gcc/ChangeLog:
    
    2019-10-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
    
    	Backport from mainline
    	2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
    
    	* cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal
    	for both call instructions.
    
    gcc/testsuite/ChangeLog:
    
    2019-10-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
    
    	Backport from mainline
    	2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
    
    	* gcc.target/mips/cfgcleanup-jalr1.c: New test.
    	* gcc.target/mips/cfgcleanup-jalr2.c: New test.
    	* gcc.target/mips/cfgcleanup-jalr3.c: New test.
    
    From-SVN: r277625

Diff:
---
 gcc/ChangeLog                                    |  8 ++++++++
 gcc/cfgcleanup.c                                 |  9 +++++++++
 gcc/testsuite/ChangeLog                          |  9 +++++++++
 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c | 19 +++++++++++++++++++
 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c | 23 +++++++++++++++++++++++
 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c | 23 +++++++++++++++++++++++
 6 files changed, 91 insertions(+)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ce4630b..8cd677e 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-10-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+	Backport from mainline
+	2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+	* cfgcleanup.c (old_insns_match_p): Check if used hard regs set is equal
+	for both call instructions.
+
 2019-10-30  Thomas Schwinge  <thomas@codesourcery.com>
 
 	Backport from trunk:
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c
index 4c3fc8d..e90cc43 100644
--- a/gcc/cfgcleanup.c
+++ b/gcc/cfgcleanup.c
@@ -53,6 +53,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "dce.h"
 #include "dbgcnt.h"
 #include "rtl-iter.h"
+#include "regs.h"
 
 #define FORWARDER_BLOCK_P(BB) ((BB)->flags & BB_FORWARDER_BLOCK)
 
@@ -1228,6 +1229,14 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2)
 		}
 	    }
 	}
+
+      HARD_REG_SET i1_used, i2_used;
+
+      get_call_reg_set_usage (i1, &i1_used, call_used_reg_set);
+      get_call_reg_set_usage (i2, &i2_used, call_used_reg_set);
+
+      if (!hard_reg_set_equal_p (i1_used, i2_used))
+        return dir_none;
     }
 
   /* If both i1 and i2 are frame related, verify all the CFA notes
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cf84d9b..19272a4 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2019-10-30  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+	Backport from mainline
+	2019-07-09  Dragan Mladjenovic  <dmladjenovic@wavecomp.com>
+
+	* gcc.target/mips/cfgcleanup-jalr1.c: New test.
+	* gcc.target/mips/cfgcleanup-jalr2.c: New test.
+	* gcc.target/mips/cfgcleanup-jalr3.c: New test.
+
 2019-10-29  Jakub Jelinek  <jakub@redhat.com>
 
 	PR c++/92201
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c
new file mode 100644
index 0000000..24c1826
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr1.c
@@ -0,0 +1,19 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+extern void foo (void*);
+
+extern void bar (void*);
+
+void
+test (void* p)
+{
+   if (!p)
+	foo(p);
+   else
+	bar(p);
+}
+
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c
new file mode 100644
index 0000000..9fd75c9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr2.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+static int foo (void* p) { __asm__ (""::"r"(p):"$t0"); return 0; }
+
+static int bar (void* p) { return 1; }
+
+int
+test (void* p)
+{
+  int res = !p ? foo(p) : bar(p);
+
+  register int tmp __asm__("$t0") = -1;
+  __asm__ (""::"r"(tmp));
+
+  return res;
+}
+
+/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
+/* { dg-final { scan-assembler-not "\\.set\tnomacro\n\tjalr\t\\\$25" } } */
diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c
new file mode 100644
index 0000000..580c6ec
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr3.c
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-mabicalls -fpic -mno-mips16 -mno-micromips" } */
+/* { dg-additional-options "-fno-inline -fipa-ra -mcompact-branches=never" } */
+/* { dg-skip-if "needs codesize optimization" { *-*-* } { "-O0" "-O1" "-O2" "-O3" } { "" } } */
+
+static int foo (void* p) { return 0; }
+
+static int bar (void* p) { return 1; }
+
+int
+test (void* p)
+{
+  int res = !p ? foo(p) : bar(p);
+
+  register int tmp __asm__("$t0") = -1;
+  __asm__ (""::"r"(tmp));
+
+  return res;
+}
+
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */
+/* { dg-final { scan-assembler-not "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
+/* { dg-final { scan-assembler "\\.set\tnomacro\n\tjalr\t\\\$25" } } */



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