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r195466 - in /branches/ARM/aarch64-4.7-branch/g...


Author: belagod
Date: Fri Jan 25 11:34:04 2013
New Revision: 195466

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=195466
Log:
2013-01-25  Tejas Belagod  <tejas.belagod@arm.com>

        * config/aarch64/aarch64-simd-builtins.def: Separate sq<r>dmulh_lane
        entries into lane and laneq entries.
        * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh_lane<mode>): Remove
        AdvSIMD scalar modes.
        (aarch64_sq<r>dmulh_laneq<mode>): New. 
        (aarch64_sq<r>dmulh_lane<mode>): New RTL pattern for Scalar AdvSIMD
        modes.
        * config/aarch64/arm_neon.h: Fix all the vq<r>dmulh_lane* intrinsics'
        builtin implementations to relfect changes in RTL in aarch64-simd.md.
        * config/aarch64/iterators.md (VCOND): New. 
        (VCONQ): New. 


Modified:
    branches/ARM/aarch64-4.7-branch/gcc/ChangeLog.aarch64
    branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/aarch64-simd-builtins.def
    branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/aarch64-simd.md
    branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/arm_neon.h
    branches/ARM/aarch64-4.7-branch/gcc/config/aarch64/iterators.md


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