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r172483 - in /branches/gcc-4_6-branch/gcc: Chan...
- From: jakub at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Fri, 15 Apr 2011 10:21:01 -0000
- Subject: r172483 - in /branches/gcc-4_6-branch/gcc: Chan...
Author: jakub
Date: Fri Apr 15 10:21:00 2011
New Revision: 172483
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=172483
Log:
PR target/48605
* config/i386/sse.md (avx_insertps, sse4_1_insertps): If operands[2]
is a MEM, offset it as needed based on top 2 bits in operands[3],
change MEM mode to SFmode and mask those 2 bits away from operands[3].
* gcc.target/i386/sse4_1-insertps-3.c: New test.
* gcc.target/i386/sse4_1-insertps-4.c: New test.
* gcc.target/i386/avx-insertps-3.c: New test.
* gcc.target/i386/avx-insertps-4.c: New test.
Added:
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/i386/avx-vinsertps-3.c
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/i386/avx-vinsertps-4.c
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/i386/sse4_1-insertps-3.c
branches/gcc-4_6-branch/gcc/testsuite/gcc.target/i386/sse4_1-insertps-4.c
Modified:
branches/gcc-4_6-branch/gcc/ChangeLog
branches/gcc-4_6-branch/gcc/config/i386/sse.md
branches/gcc-4_6-branch/gcc/testsuite/ChangeLog