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r126019 - in /branches/redhat/gcc-4_1-branch/gc...
- From: jakub at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: Tue, 26 Jun 2007 11:41:15 -0000
- Subject: r126019 - in /branches/redhat/gcc-4_1-branch/gc...
Author: jakub
Date: Tue Jun 26 11:41:14 2007
New Revision: 126019
URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=126019
Log:
2007-02-10 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/sse4a-extract.c: Add "LL" to 64bit constants.
* gcc.target/i386/sse4a-insert.c: Likewise.
2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com>
* config/i386/xmmintrin.h: Make inclusion of emmintrin.h
conditional to __SSE2__.
* config/i386/emmintrin.h: Generate #error if __SSE2__ is not
defined.
* config/i386/pmmintrin.h: Generate #error if __SSE3__ is not
defined.
* config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not
defined.
2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com>
* config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8,
athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov,
athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul,
athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn,
athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8,
athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load,
athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8,
athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10.
* config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse,
cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387,
swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse,
fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse,
x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed,
floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse,
floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1,
mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn,
umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn,
umuldi3_highpart_rex64, umulsi3_highpart_insn,
umulsi3_highpart_zext, smuldi3_highpart_rex64,
smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld,
x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse,
sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387,
sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387,
sqrtextenddfxf2_i387): Added amdfam10_decode.
* config/i386/athlon.md (athlon_idirect_amdfam10,
athlon_ivector_amdfam10, athlon_idirect_load_amdfam10,
athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10,
athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10,
athlon_ivector_store_amdfam10): New define_insn_reservation.
(athlon_idirect_loadmov, athlon_idirect_movstore): Added
amdfam10.
* config/i386/athlon.md (athlon_call_amdfam10,
athlon_pop_amdfam10, athlon_lea_amdfam10): New
define_insn_reservation.
(athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8,
athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI,
athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10.
* config/i386/athlon.md (athlon_sseld_amdfam10,
athlon_mmxld_amdfam10, athlon_ssest_amdfam10,
athlon_mmxssest_short_amdfam10): New define_insn_reservation.
* config/i386/athlon.md (athlon_sseins_amdfam10): New
define_insn_reservation.
* config/i386/i386.md (sseins): Added sseins to define_attr type
and define_attr unit.
* config/i386/sse.md: Set type attribute to sseins for insertq
and insertqi.
* config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10,
ssecmpvector_load_amdfam10, ssecmpvector_amdfam10,
ssecomi_load_amdfam10, ssecomi_amdfam10,
sseaddvector_load_amdfam10, sseaddvector_amdfam10): New
define_insn_reservation.
(ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10.
* config/i386/athlon.md (cvtss2sd_load_amdfam10,
cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10,
cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10,
cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10,
cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10,
cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New
define_insn_reservation.
* config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si,
cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq,
cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq,
cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd,
cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute.
* config/i386/athlon.md (athlon_ssedivvector_amdfam10,
athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10,
athlon_ssemulvector_load_amdfam10): New define_insn_reservation.
(athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul,
athlon_ssemul_load_k8): Added amdfam10.
* config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro.
(x86_sse_unaligned_move_optimal): New variable.
* config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for
m_AMDFAM10.
(ix86_expand_vector_move_misalign): Add code to generate movupd/movups
for unaligned vector SSE double/single precision loads for AMDFAM10.
* config/i386/i386.h (TARGET_AMDFAM10): New macro.
(TARGET_CPU_CPP_BUILTINS): Add code for amdfam10.
Define TARGET_CPU_DEFAULT_amdfam10.
(TARGET_CPU_DEFAULT_NAMES): Add amdfam10.
(processor_type): Add PROCESSOR_AMDFAM10.
* config/i386/i386.md: Add amdfam10 as a new cpu attribute to match
processor_type in config/i386/i386.h.
Enable imul peepholes for TARGET_AMDFAM10.
* config.gcc: Add support for --with-cpu option for amdfam10.
* config/i386/i386.c (amdfam10_cost): New variable.
(m_AMDFAM10): New macro.
(m_ATHLON_K8_AMDFAM10): New macro.
(x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen,
x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop,
x86_promote_QImode, x86_integer_DFmode_moves,
x86_partial_reg_dependency, x86_memory_mismatch_stall,
x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387,
x86_sse_partial_reg_dependency, x86_sse_typeless_stores,
x86_use_ffreep, x86_use_incdec, x86_four_jump_limit,
x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns):
Enable/disable for amdfam10.
(override_options): Add amdfam10_cost to processor_target_table.
Set up PROCESSOR_AMDFAM10 for amdfam10 entry in
processor_alias_table.
(ix86_issue_rate): Add PROCESSOR_AMDFAM10.
(ix86_adjust_cost): Add code for amdfam10.
* config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm)
instruction set feature flag. Add new (-mpopcnt) flag for popcnt
instruction. Add new SSE4A (-msse4a) instruction set feature flag.
* config/i386/i386.h: Add builtin definition for SSE4A.
* config/i386/i386.md: Add support for ABM instructions
(popcnt and lzcnt).
* config/i386/sse.md: Add support for SSE4A instructions
(movntss, movntsd, extrq, insertq).
* config/i386/i386.c: Add support for ABM and SSE4A builtins.
Add -march=amdfam10 flag.
* config/i386/ammintrin.h: Add support for SSE4A intrinsics.
* doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt
and amdfam10.
* doc/extend.texi: Add documentation for SSE4A builtins.
2007-02-05 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com>
* gcc.dg/i386-cpuid.h: Test whether SSE4A is supported
for running tests.
* gcc.target/i386/sse4a-extract.c: New test.
* gcc.target/i386/sse4a-insert.c: New test.
* gcc.target/i386/sse4a-montsd.c: New test.
* gcc.target/i386/sse4a-montss.c: New test.
2006-12-15 H.J. Lu <hongjiu.lu@intel.com>
* gcc.dg/i386-cpuid.h (bit_SSSE3): New.
2006-11-30 H.J. Lu <hongjiu.lu@intel.com>
* gcc.dg/i386-cpuid.h (bit_SSE3): New.
(i386_get_cpuid): New function.
(i386_cpuid_ecx): Likewise.
(i386_cpuid_edx): Likewise.
(i386_cpuid): Updated to call i386_cpuid_edx.
Added:
branches/redhat/gcc-4_1-branch/gcc/config/i386/ammintrin.h
branches/redhat/gcc-4_1-branch/gcc/testsuite/gcc.target/i386/sse4a-extract.c
branches/redhat/gcc-4_1-branch/gcc/testsuite/gcc.target/i386/sse4a-insert.c
branches/redhat/gcc-4_1-branch/gcc/testsuite/gcc.target/i386/sse4a-montsd.c
branches/redhat/gcc-4_1-branch/gcc/testsuite/gcc.target/i386/sse4a-montss.c
Modified:
branches/redhat/gcc-4_1-branch/gcc/ChangeLog
branches/redhat/gcc-4_1-branch/gcc/config.gcc
branches/redhat/gcc-4_1-branch/gcc/config/i386/athlon.md
branches/redhat/gcc-4_1-branch/gcc/config/i386/emmintrin.h
branches/redhat/gcc-4_1-branch/gcc/config/i386/i386.c
branches/redhat/gcc-4_1-branch/gcc/config/i386/i386.h
branches/redhat/gcc-4_1-branch/gcc/config/i386/i386.md
branches/redhat/gcc-4_1-branch/gcc/config/i386/i386.opt
branches/redhat/gcc-4_1-branch/gcc/config/i386/pmmintrin.h
branches/redhat/gcc-4_1-branch/gcc/config/i386/sse.md
branches/redhat/gcc-4_1-branch/gcc/config/i386/tmmintrin.h
branches/redhat/gcc-4_1-branch/gcc/config/i386/xmmintrin.h
branches/redhat/gcc-4_1-branch/gcc/doc/extend.texi
branches/redhat/gcc-4_1-branch/gcc/doc/invoke.texi
branches/redhat/gcc-4_1-branch/gcc/testsuite/ChangeLog
branches/redhat/gcc-4_1-branch/gcc/testsuite/gcc.dg/i386-cpuid.h