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gcc/gcc ChangeLog config/mips/mips.h config/mi ...
- From: rsandifo at gcc dot gnu dot org
- To: gcc-cvs at gcc dot gnu dot org
- Date: 7 Oct 2002 08:53:42 -0000
- Subject: gcc/gcc ChangeLog config/mips/mips.h config/mi ...
CVSROOT: /cvs/gcc
Module name: gcc
Branch: mips-3_4-rewrite-branch
Changes by: rsandifo@gcc.gnu.org 2002-10-07 01:53:42
Modified files:
gcc : ChangeLog
gcc/config/mips: mips.h mips-protos.h mips.c mips.md
Log message:
* config/mips/mips-protos.h (mips_emit_fcc_reload): Declare.
* config/mips/mips.h (PREDICATE_CODES): Add fcc_register_operand.
* config/mips/mips.c (fcc_register_operand): New function.
(mips_emit_fcc_reload): New function, extracted from reload_incc.
(override_options): Allow TFmode values in float registers
if ISA_HAS_8CC.
* cnfig/mips/mips.md (reload_incc): Change destination prediate
to fcc_register_operand. Remove misleading source constraint.
Use mips_emit_fcc_reload.
(reload_outcc): Duplicate reload_incc.
Patches:
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=mips-3_4-rewrite-branch&r1=1.15417.2.2&r2=1.15417.2.3
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips.h.diff?cvsroot=gcc&only_with_tag=mips-3_4-rewrite-branch&r1=1.216.2.2&r2=1.216.2.3
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips-protos.h.diff?cvsroot=gcc&only_with_tag=mips-3_4-rewrite-branch&r1=1.28&r2=1.28.8.1
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips.c.diff?cvsroot=gcc&only_with_tag=mips-3_4-rewrite-branch&r1=1.226.2.2&r2=1.226.2.3
http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips.md.diff?cvsroot=gcc&only_with_tag=mips-3_4-rewrite-branch&r1=1.141.6.2&r2=1.141.6.3