This is the mail archive of the gcc-bugs@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug rtl-optimization/86107] [9 Regression] ICE: in ix86_mitigate_rop, at config/i386/i386.c:42301 with -O -funroll-loops -mavx5124fmaps -mmitigate-rop --param=hot-bb-frequency-fraction=1


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=86107

rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rsandifo at gcc dot gnu.org

--- Comment #4 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #2)
> For some reason, this part of x86_mitigate_rop:
> 
>       int n_uses;
>       reg_class superclass = regrename_find_superclass (head, &n_uses,
> 							&unavailable);
>       old_reg = head->regno;
>       best_reg = find_rename_reg (head, superclass, &unavailable,
> 				  old_reg, false);
>       bool ok = regrename_do_replace (head, best_reg);
>       gcc_assert (ok);
>       if (dump_file)
> 	fprintf (dump_file, "Chain %d renamed as %s in %s\n", head->id,
> 		 reg_names[best_reg], reg_class_names[superclass]);
> 
> does not validate in regrename_do_replace.
> 
> The compiler wants to rename:
> 
> (insn 1264 1263 1265 5 (set (reg:DI 22 xmm1 [594])
>         (reg:DI 3 bx [594])) "pr86107.c":15 85 {*movdi_internal}
>      (expr_list:REG_DEAD (reg:DI 3 bx [594])
>         (nil)))
> 
> to:
> 
> (set (reg:DI 22 xmm1 [594])
>     (reg:DI 1 dx [594]))
> 
> and fails validation of new instruction.
> 
> The alternative 20 in *movdi_internal (*v->?r) is marked with
> preferred_for_speed attribute:
> 
>    (set (attr "preferred_for_speed")
>      (cond [(eq_attr "alternative" "10,17,19")
> 	      (symbol_ref "TARGET_INTER_UNIT_MOVES_FROM_VEC")
> 	    (eq_attr "alternative" "11,18,20")
> 	      (symbol_ref "TARGET_INTER_UNIT_MOVES_TO_VEC")
> 	   ]
> 	   (symbol_ref "true")))
> 
> but should not fail verification even for !TARGET_INTER_UNIT_MOVES_TO_VEC
> targets. As a matter of fact, the compilation works with -mtune=intel.

This is by design when the insn belongs to a block that is being
optimised for speed rather than size.  It isn't recog per se that
fails, but the validate_change stuff, which is designed for doing
optional optimisations rather than required changes.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]