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[Bug target/85328] [8 Regression] accessing ymm16 with non-avx512 instruction form
- From: "jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 11 Apr 2018 10:16:57 +0000
- Subject: [Bug target/85328] [8 Regression] accessing ymm16 with non-avx512 instruction form
- Auto-submitted: auto-generated
- References: <bug-85328-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85328
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Created attachment 43907
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=43907&action=edit
gcc8-pr85328.patch
Many patterns rely on ix86_hard_regno_mode_ok not allowing < 512-bit vector
modes in xmm16+ registers. Unfortunately, the vec_extract_lo_* splitters
provide a loophole for this, by creating e.g. on this testcase V32QImode xmm16
hard register which then is propagated into the vpand. The patch fixes that by
avoiding that, essentially forcing the low half or quarter vector extraction
from the zmm16+ registers to be a 512-bit move into the other register (which
must be necessarily < xmm16.