This is the mail archive of the
gcc-bugs@gcc.gnu.org
mailing list for the GCC project.
[Bug target/84790] Miscompilation for MIPS16 with -fpic and -Os or -O2
- From: "mschiffer at universe-factory dot net" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sat, 10 Mar 2018 13:26:44 +0000
- Subject: [Bug target/84790] Miscompilation for MIPS16 with -fpic and -Os or -O2
- Auto-submitted: auto-generated
- References: <bug-84790-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790
--- Comment #2 from Matthias Schiffer <mschiffer@universe-factory.net> ---
The problem seems to be that the gp init sequence
li $2,%hi(_gp_disp)
addiu $3,$pc,%lo(_gp_disp)
sll $2,16
addu $2,$3
is generated very late and does not appear in the RTL in any way, so optimizing
passes are not aware of the $3 (and possibly $2?) clobber. I don't know enough
about GCC internals for further analysis.