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[Bug target/83399] Power8 ICE During LRA with 2-op rtl pattern for lvx instruction
- From: "segher at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sat, 23 Dec 2017 18:32:52 +0000
- Subject: [Bug target/83399] Power8 ICE During LRA with 2-op rtl pattern for lvx instruction
- Auto-submitted: auto-generated
- References: <bug-83399-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83399
Segher Boessenkool <segher at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |ice-on-invalid-code
Target|powerpc64le |powerpc64*-*-*
Status|UNCONFIRMED |NEW
Last reconfirmed| |2017-12-23
Ever confirmed|0 |1
--- Comment #2 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Confirmed. It is invalid code, but shouldn't ICE (as it does with -mabi-elfv2,
also on BE).