[Bug target/81616] Update -mtune=generic for the current Intel and AMD processors

["hubicka at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=81616

Jan Hubicka <hubicka at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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             Status|NEW                         |ASSIGNED

--- Comment #3 from Jan Hubicka <hubicka at gcc dot gnu.org> ---
I am mostly done with my tuning overhaul for core+ and znver and
I plan to work on generic now in early stage3.  My rough plan is
 - drop flags that are there for benefit of anything earlier than core2 and
buldozer
 - base costs of instructions on Haswell (and later)+ZNver1 latencies, keep in
mind buldozers.
 - revisit code alignment strategies. It seems to me that by default we align
way too much for both core and Zen. Maybe code alignment does not pay back at
all for -O2 and should be done at -Ofast only or so.
 - switch instruction scheduling to more modern chip (currently we schedule for
K8).  Here I need to figure out how much core based chips care about particular
scheduler model, but I suspect both core and Zen are quite neutral here and
mostly benefit from basic scheduling for latencies.
 - figure out best vectorization model - here AVX may be a fun, because core
and znver preffers different kind of codegen. 

Ideas are welcome.