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[Bug inline-asm/82701] New: RFE: x86: double word operands in inline assembly
- From: "hpa at zytor dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 24 Oct 2017 16:06:52 +0000
- Subject: [Bug inline-asm/82701] New: RFE: x86: double word operands in inline assembly
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82701
Bug ID: 82701
Summary: RFE: x86: double word operands in inline assembly
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: inline-asm
Assignee: unassigned at gcc dot gnu.org
Reporter: hpa at zytor dot com
Target Milestone: ---
x86 inline assembly currently has no sensible way to use doubleword operands
(long long on x86-32, __int128 on x86-64) without restricting them to the d:a
register pair via the "A" constraint, and hard-coding the register names. It
would be highly desirable to have a clean way to emit into the assembly code
the upper half of a doublewidth operand (register or memory) without
artificially constraining code generation.
In some ways, this is similar to the "H" modifier, except it would be +4 for
memory operands on 32 bits. I'm calling it U below.
For an artificial example:
uint64_t a, b;
/* a += b; */
asm("add %1,%0; adc %U1,%U0" : "+rm,r" (a) : "ri,m" (b) : "cc");
For a register: print the high register of the pair.
For a memory operand: print the address + the word size
For an immediate: print the value >> (word size*8)