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[Bug target/82259] missed optimization: use LEA to add 1 to flip the low bit when copying before AND with 1


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82259

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Peter Cordes from comment #4)
> (In reply to Uroš Bizjak from comment #2)
> > A couple of *scc_bt patterns are missing. These are similar to already
> > existing *jcc_bt patterns. Combine wants:
> 
> Does gcc also need patterns for bt + cmovcc?

Actually, my setcc bt patch interferes with cmovcc. Without the patch, gcc
manages to create:

sarl %cl, %edi
andl $1, %edi
cmovne %edx, %eax

and when patched gcc creates bt insn, following asm is created:

btl %esi, %edi
setc %dl
testl %edx, %edx
cmovne %ecx, %eax.

I'll revert the patch.

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