[Bug target/80700] [7/8 Regression] ICE: Bus error (on SPE target)

["segher at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80700

--- Comment #6 from Segher Boessenkool <segher at gcc dot gnu.org> ---
LR and CTR together are a register class -- they both can be used as jump
target, in the same way.  Converting LR to be a fixed register is not going
to be trivial, either.

But, where does it come from here:

(define_insn "*mov_si<mode>_e500_subreg4_2_be"
  [(set (match_operand:SI 0 "rs6000_nonimmediate_operand" "=r,m")
        (subreg:SI (match_operand:SPE64TF 1 "register_operand" "r,r") 4))]

where rs6000_nonimmediate_operand is essentially nonimmediate_operand, so

int
nonimmediate_operand (rtx op, machine_mode mode)
{
  return (general_operand (op, mode) && ! CONSTANT_P (op));
}


Things would work better if silly things were refused in the predicate already,
instead of trying to reload and letting the constraint deal with it.