[Bug target/82106] [RISCV] Misaligned loads generated when doubles are split between stack and registers

["asb at lowrisc dot org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82106

--- Comment #2 from Alex Bradbury <asb at lowrisc dot org> ---
Same problem with `-mstrict-align`, which as you say makes this worse.

I'm actually not sure if this is an ABI-visible issue. The vararg save area and
it's location is basically required by the ABI due to the dual restrictions of
1) keeping saved fp and ra at consistent offsets to s0, and 2) ensure that
argument registers are contiguous with arguments passed via the stack. I might
be missing something obvious, but I'm not seeing any similar restrictions that
enforce the use of a save area for arguments split between the stack and a
register. I posted to RISC-V sw-dev for another opinion on this
<https://groups.google.com/a/groups.riscv.org/d/msg/sw-dev/SsO9Dq7wooI/OioZNHUAAwAJ>.
It's very possible I'm missing something obvious of course.

Assuming I'm not missing anything, I don't think it would be ABI-visible to
change gcc so it reconstructs the split argument as a local in a
properly-aligned stack location.