[Bug c/80999] New: gcc 7.x: bus error from 8-bit access to 32-bit only register at -O2

["alberto.vignani at fastwebnet dot it" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80999

            Bug ID: 80999
           Summary: gcc 7.x: bus error from 8-bit access to 32-bit only
                    register at -O2
           Product: gcc
           Version: 7.1.1
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: alberto.vignani at fastwebnet dot it
  Target Milestone: ---

gcc armhf 7.x.x on linux, ARM i.Mx6

To access a 32-bit memory-mapped processor register and extract the lower 8
bits I used this code:

   void *ptr = {some value got from mmap /dev/mem}
   int value = *((unsigned *)ptr) & 0xff;

This produces the correct 32-bit memory access followed by masking on gcc6 and
gcc7 at -O0.
gcc6:
        ldr     r3, [r9, r7]    @ MEM[(unsigned int *)ioc2_229], MEM[(unsigned
int *)ioc2_229]
        uxtb    r7, r2  @ mode, prephitmp_371

gcc7, -O0:
        ldr     r3, [r3]        @ _216, MEM[(unsigned int *)ioc1_377]
        uxtb    r3, r3  @ tmp507, _216

With gcc7 at -O2 the code is optimized to a byte access by removing the
masking:
        ldrb    r7, [r2]        @ zero_extendqisi2      @ mode, MEM[(unsigned
int *)ioc1_284]

But the hardware only accepts 32-bit accesses for that particular register and
throws a bus error.
This (over-)optimization is dangerous. Is there a way to constrain the access
width on a memory range?