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[Bug target/80402] New: Missed optimization on x86/x86_64
- From: "mednafen at sent dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 11 Apr 2017 22:44:09 +0000
- Subject: [Bug target/80402] New: Missed optimization on x86/x86_64
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80402
Bug ID: 80402
Summary: Missed optimization on x86/x86_64
Product: gcc
Version: unknown
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: normal
Priority: P3
Component: target
Assignee: unassigned at gcc dot gnu.org
Reporter: mednafen at sent dot com
Target Milestone: ---
Target: x86_64
Created attachment 41181
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=41181&action=edit
sample code
A statement like "if(!(a & 0xF) || (b & (1U << 6)))" could be compiled to a
"test","bt" pair followed by a single conditional branch/move instruction, but
gcc currently compiles it to a combination of two tests and conditional
branch/move instructions.
From
https://software.intel.com/sites/default/files/managed/ad/01/253666-sdm-vol-2a.pdf
Page 3-114, BT: "The ZF flag is unaffected."
Old versions(prior to early 2010, as far as I can tell) of the manual had the
flag as being undefined, so it may be prudent to talk to Intel and AMD
engineers before implementing this optimization.
Attached is sample code that includes the optimal form via inline
assembly(test4() function).