[Bug rtl-optimization/79593] [6/7 Regression] Poor/Worse code generation for FPU on versions after 6

["ubizjak at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=79593

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|missed-optimization         |ra
             Status|WAITING                     |NEW
                 CC|                            |vmakarov at gcc dot gnu.org
          Component|target                      |rtl-optimization

--- Comment #15 from Uroš Bizjak <ubizjak at gmail dot com> ---
For the remaining issue:

   mov     eax, DWORD PTR [eax+4]
   ...
   mov     DWORD PTR [esp], eax     # worse than v6: spills to stack!
   fld     DWORD PTR [esp]          # instead of 'fsubr DWORD PTR [eax+4]'
   fsubrp  st(2), st

register allocator doesn't figure out that it loaded eax from [eax+4] a couple
of insns above - instead of a spill, it can access the value from the same
location.

This is a RA regression from gcc-5.