[Bug target/78639] New: Power9 bad code generation for cactusADM benchmark

["meissner at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78639

            Bug ID: 78639
           Summary: Power9 bad code generation for cactusADM benchmark
           Product: gcc
           Version: 7.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: meissner at gcc dot gnu.org
  Target Milestone: ---

I was building the Spec 2006 benchmark targeting the forthcoming power9
processor and I noticed the cactusADM benchmark did not build.

The bug is due to my change on November 21st, 2016 (subversion id 242679).  If
a DImode value in an Altivec register is to be stored with a register+register
address, the compiler generated STXSD (register+offset) instead of STXSDX
(register+register).

In the movdi_internal64 pattern, I deleted a 'w' from the STXSD constraint,
which meant the constraint was using "Y" instead of "wY".  "Y" allows reg+reg,
while "wY" does not (and also enforces a stricter alignment check).