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[Bug rtl-optimization/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0
- From: "bernd.edlinger at hotmail dot de" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 20 Oct 2016 15:58:41 +0000
- Subject: [Bug rtl-optimization/78041] Wrong code on ARMv7 with -mthumb -mfpu=neon-fp16 -O0
- Auto-submitted: auto-generated
- References: <bug-78041-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78041
--- Comment #9 from Bernd Edlinger <bernd.edlinger at hotmail dot de> ---
(In reply to Wilco from comment #8)
>
> I've got a patch that fixes it, it's being tested.
>
> While looking at how DI mode operations get expanded, I noticed there is a
> CQ issue with your shift change. Shifts that are expanded early now use
> extra registers due to the DI mode write of zero. Given all other DI mode
> operations are expanded after reload, it may be better to do the same for
> shifts too.
Interesting idea. After reload there is no need anymore to zero the
DI mode register at all, so that could become completely unnecessary.