[Bug target/72802] powerpc64le: -mcpu=power9 emits lxssp instruction with offset that isn't a multiple of 4

["amodra at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=72802

--- Comment #6 from Alan Modra <amodra at gcc dot gnu.org> ---
Author: amodra
Date: Mon Aug  8 09:06:49 2016
New Revision: 239234

URL: https://gcc.gnu.org/viewcvs?rev=239234&root=gcc&view=rev
Log:
[RS6000] PR72802 part 2, reload ICE

After fixing the constraint problem, we hit an "insn does not satisfy
its constraints" with -mno-lra on the following insn, a vector load
from mem which has an invalid offset:
(insn 631 630 1122 12 (set (reg:SF 108 31 [orig:260 pretmp_44 ] [260])
        (mem:SF (plus:DI (reg:DI 30 30 [orig:338 ivtmp.141 ] [338])
                (const_int 2 [0x2])) [5 MEM[base: _1, offset: 2B]+0 S4 A32]))
470 {movsf_hardfloat}
     (nil))

Here are the reload costs for the various alternatives of
movsf_hardfloat:
"=!r, !r,  m,  f, ww, ww, !r,  f, wb,  m, wY, wu,  Z,?wn, ?r,*c*l, !r, *h"
  "r,  m,  r,  f, ww,  j,  j,  m, wY,  f, wb,  Z, wu,  r, wn,   r, *h,  0"
 617 609  17  17   8   8 617   9   8  17  17   8  17  23  23   17 617  17

Notice that the cost for a vector<-vector move (ww,ww) is the same as
the cost for a vector<-mem move (wb,wY or wu,Z).  Since the
vector<-vector move comes first, it is chosen and the mem part of the
insn reloaded.  That just gives another copy of insn 631.

        PR target/72802
        * config/rs6000/rs6000.md (mov<mode>_hardfloat): Sort
        alternatives.  Put loads first, then stores, and reg/reg moves
        within same class later.  Delete attr length.
testsuite/
        * gcc.c-torture/compile/pr72802.c: New.

Added:
    trunk/gcc/testsuite/gcc.c-torture/compile/pr72802.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.md
    trunk/gcc/testsuite/ChangeLog