[Bug target/71763] powerpc64: ICE due to need for output reload on jump

["segher at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71763

--- Comment #9 from Segher Boessenkool <segher at gcc dot gnu.org> ---
Author: segher
Date: Thu Jul  7 03:09:03 2016
New Revision: 238076

URL: https://gcc.gnu.org/viewcvs?rev=238076&root=gcc&view=rev
Log:
rs6000: Make the ctr* patterns allow ints in vector regs (PR71763)

Similar to PR70098, which is about integers in floating point registers,
we can have the completely analogous problem with vector registers as well
now that we allow integers in vector registers.  So, this patch solves it
in the same way.  This only works for targets with direct move.

To recap: register allocation can decide to put an integer mode value in
a floating point or vector register.  If that register is used in a bd*z
instruction, which is a jump instruction, reload can not do an output
reload on it (it does not do output reloads on any jump insns), so the
float or vector register will remain, and we have to allow it here or
recog will ICE.  Later on we will split this to valid instructions,
including a move from that fp/vec register to an int register; it is this
move that will still fail (PR70098) if we do not have direct move enabled.


        PR target/70098
        PR target/71763
        * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2,
        *ctr<mode>_internal5, *ctr<mode>_internal6): Add *wi to the output
        constraint.

gcc/testsuite/
        PR target/70098
        PR target/71763
        * gcc.target/powerpc/pr71763.c: New file.

Added:
    trunk/gcc/testsuite/gcc.target/powerpc/pr71763.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.md
    trunk/gcc/testsuite/ChangeLog