[Bug tree-optimization/70396] ICE on valid code at -O3 in 32-bit and 64-bit modes on x86_64-linux-gnu (in immed_wide_int_const, at emit-rtl.c:606)

["rguenth at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70396

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Martin LiÅka from comment #5)
> Hi.
> 
> With the updated version of the compiler, I still get the ICE for:
> 
> $ cat tc.ii
> 
> void fn1() {
>   unsigned *a = 0;
>   for (int i; i; ++i) {
>     unsigned g(a[i] << 8 >> 24);
>     a[i] = g;
>   }
> }
> 
> $ /home/marxin/bin/gcc2/lib/gcc/x86_64-pc-linux-gnu/7.0.0/cc1plus
> -fpreprocessed tc.ii -march=haswell -mmmx -mno-3dnow -msse -msse2 -msse3
> -mssse3 -mno-sse4a -mcx16 -msahf -mmovbe -maes -mno-sha -mpclmul -mpopcnt
> -mabm -mno-lwp -mfma -mno-fma4 -mno-xop -mbmi -mbmi2 -mno-tbm -mavx -mavx2
> -msse4.2 -msse4.1 -mlzcnt -mno-rtm -mno-hle -mrdrnd -mf16c -mfsgsbase
> -mno-rdseed -mno-prfchw -mno-adx -mfxsr -mxsave -mxsaveopt -mno-avx512f
> -mno-avx512er -mno-avx512cd -mno-avx512pf -mno-prefetchwt1 -mno-clflushopt
> -mno-xsavec -mno-xsaves -mno-avx512dq -mno-avx512bw -mno-avx512vl
> -mno-avx512ifma -mno-avx512vbmi -mno-clwb -mno-pcommit -mno-mwaitx
> -mno-clzero -mno-pku --param l1-cache-size=32 --param l1-cache-line-size=64
> --param l2-cache-size=8192 -mtune=haswell -quiet -dumpbase tc.ii -O3
> 
> tc.ii:7:1: internal compiler error: in immed_wide_int_const, at
> emit-rtl.c:606
>  }
>  ^
> 0xa4cf35 immed_wide_int_const(generic_wide_int<wide_int_ref_storage<false> >
> const&, machine_mode)
> 	../../gcc/emit-rtl.c:606
> 0x13929a9 change_zero_ext
> 	../../gcc/combine.c:11111
> 0x13937d8 recog_for_combine
> 	../../gcc/combine.c:11148
> 0x13a175d try_combine
> 	../../gcc/combine.c:3503
> 0x13a6fc1 combine_instructions
> 	../../gcc/combine.c:1288
> 0x13a6fc1 rest_of_handle_combine
> 	../../gcc/combine.c:14348
> 0x13a6fc1 execute
> 	../../gcc/combine.c:14391
> 
> Thanks

Looks like a different issue - please file a new bug.

#2  0x00000000019c0fb7 in change_zero_ext (src=0x7ffff6688958)
    at /space/rguenther/src/svn/trunk/gcc/combine.c:11111
11111         x = gen_rtx_AND (mode, x, immed_wide_int_const (mask, mode));
(gdb) l
11106           }
11107         else
11108           continue;
11109
11110         wide_int mask = wi::mask (size, false, GET_MODE_PRECISION
(mode));
11111         x = gen_rtx_AND (mode, x, immed_wide_int_const (mask, mode));
11112
11113         SUBST (**iter, x);
11114         changed = true;
11115       }
(gdb) p debug_rtx (src)
Cannot resolve function debug_rtx to any overloaded instance
(gdb) p src
$1 = (rtx *) 0x7ffff6688958
(gdb) p debug_rtx (*src)
(zero_extract:V8SI (mem:V8SI (reg:DI 240 [ ivtmp.29 ]) [1 MEM[base: 0B, index:
ivtmp.29_232, offset: 0B]+0 S32 A256])
    (const_int 232 [0xe8])
    (const_int 16 [0x10]))
$2 = void

looks like either an invalid zero_extract or change_zero_ext not properly
dealing with vector modes.  It's already on insn 154:

(insn 154 153 156 17 (set (reg:V8SI 289 [ vect_g_10.15 ])
        (zero_extract:V8SI (mem:V8SI (reg:DI 240 [ ivtmp.29 ]) [1 MEM[base: 0B,
index: ivtmp.29_232, offset: 0B]+0 S32 A256])
            (const_int 232 [0xe8])
            (const_int 16 [0x10]))) t.ii:4 3098 {lshrv8si3}
     (expr_list:REG_DEAD (reg:V8SI 287 [ vect__5.14 ])
        (nil)))

but only generated by combine as an intermediate insn it seems.

Trying 152 -> 153:
Failed to match this instruction:
(set (reg:V8SI 287 [ vect__5.14 ])
    (ashift:V8SI (mem:V8SI (reg:DI 240 [ ivtmp.29 ]) [1 MEM[base: 0B, index:
ivtmp.29_232, offset: 0B]+0 S32 A256])
        (const_int 8 [0x8])))

Trying 153 -> 154:
Failed to match this instruction:
(set (reg:V8SI 289 [ vect_g_10.15 ])
    (lshiftrt:V8SI (ashift:V8SI (reg:V8SI 288 [ MEM[base: 0B, index:
ivtmp.29_232, offset: 0B] ])
            (const_int 8 [0x8]))
        (const_int 24 [0x18])))

Trying 152, 153 -> 154:
Failed to match this instruction:
(set (reg:V8SI 289 [ vect_g_10.15 ])
    (zero_extract:V8SI (mem:V8SI (reg:DI 240 [ ivtmp.29 ]) [1 MEM[base: 0B,
index: ivtmp.29_232, offset: 0B]+0 S32 A256])
        (const_int 232 [0xe8])
        (const_int 16 [0x10])))