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[Bug middle-end/70801] New: IRA caller-saves does not support rematerialization
- From: "wdijkstr at arm dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Tue, 26 Apr 2016 11:28:31 +0000
- Subject: [Bug middle-end/70801] New: IRA caller-saves does not support rematerialization
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70801
Bug ID: 70801
Summary: IRA caller-saves does not support rematerialization
Product: gcc
Version: 7.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: wdijkstr at arm dot com
Target Milestone: ---
GCC emits the same code for caller-saves in all cases, even if the caller-save
is an immediate which can be trivially rematerialized. The caller-save code
should support rematerialization directly by omitting saves and emitting the
init value for restores. This allows the cost of rematerializeable caller-saves
to be lowered and avoids a stack slot.
Alternatively given the spill code already supports rematerialization, it may
be possible to stop immediates from being caller-saved by increasing their
caller-save cost significantly.
void g(void);
float bad_remat(float x)
{
x += 3.0f;
g();
x *= 3.0f;
x *= (3.0f + x);
g();
x *= 3.0f;
x *= (3.0f + x);
return x;
}
AArch64 gives with -O2 -fomit-frame-pointer -ffixed-d8 -ffixed-d9 -ffixed-d10
-ffixed-d11 -ffixed-d12 -ffixed-d13 -ffixed-d14 -ffixed-d15:
fmov s1, 3.0e+0
str x30, [sp, -32]!
fadd s0, s0, s1
stp s0, s1, [sp, 24]
bl g
ldp s0, s1, [sp, 24]
fmul s0, s0, s1
fadd s2, s0, s1
fmul s0, s0, s2
str s0, [sp, 24]
bl g
ldp s0, s1, [sp, 24]
ldr x30, [sp], 32
fmul s0, s0, s1
fadd s1, s0, s1
fmul s0, s0, s1
ret
x86_64 with plain -O2:
subq $24, %rsp
movss .LC0(%rip), %xmm1
addss %xmm1, %xmm0
movss %xmm1, 12(%rsp)
movss %xmm0, 8(%rsp)
call g
movss 8(%rsp), %xmm0
movaps %xmm0, %xmm2
movss 12(%rsp), %xmm1
mulss %xmm1, %xmm2
movaps %xmm2, %xmm0
addss %xmm1, %xmm0
mulss %xmm2, %xmm0
movss %xmm0, 8(%rsp)
call g
movss 12(%rsp), %xmm1
movss 8(%rsp), %xmm0
addq $24, %rsp
mulss %xmm1, %xmm0
addss %xmm0, %xmm1
mulss %xmm1, %xmm0
ret