[Bug debug/70628] [5/6 regression] ICE in get_reg_rtx, at emit-rtl.c:1025

["jiwang at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70628

Jiong Wang <jiwang at gcc dot gnu.org> changed:

           What    |Removed                     |Added
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                 CC|                            |jiwang at gcc dot gnu.org

--- Comment #9 from Jiong Wang <jiwang at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #7)
> Created attachment 38242 [details]
> gcc6-pr70628.patch
> 
> IMNSHO simplify-rtx.c should never generate instructions, it carefully uses
> gen_lowpart_no_emit hook instead of gen_lowpart etc., but the
> convert_memory_addr seems to be the only cases which violate this.


And looks to me postreload is doing uncessary transformation.

AArch64 failed the following check in reload_cse_simplify_operands:

      if (MEM_P (op)
          && GET_MODE_BITSIZE (GET_MODE (op)) < BITS_PER_WORD
          && LOAD_EXTEND_OP (GET_MODE (op)) != UNKNOWN)
        {

because for ILP32, we still define UNITS_PER_WORD to be 8, while x86 defined
that to be 4, thus AArch64 triggered those "make the extension explicit" code,
and trying to transform

(insn 341 111 108 12 (set (reg/f:SI 0 x0 [189])
        (mem/c:SI (plus:DI (reg/f:DI 29 x29)
                (const_int 104 [0x68])) [5 %sfp+-8 S4 A32])) bug-1.c:23 49
{*movsi_aarch64}
     (nil))

into:

(insn 341 111 108 12 (set (reg:DI 0 x0)
        (zero_extend:DI (mem/c:SI (plus:DI (reg/f:DI 29 x29)
                    (const_int 104 [0x68])) [5 %sfp+-8 S4 A32]))) bug-1.c:23 84
{*zero_extendsidi2_aarch64}
     (nil))

which looks uncessary to me.