[Bug target/70568] New: PowerPC64: union of floating and fixed doesn't use POWER8 GPR/VSR moves

["anton at samba dot org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70568

            Bug ID: 70568
           Summary: PowerPC64: union of floating and fixed doesn't use
                    POWER8 GPR/VSR moves
           Product: gcc
           Version: 6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: anton at samba dot org
  Target Milestone: ---

The following test case from both glibc and openlibm:

typedef union
{
  float value;
  /* FIXME: Assumes 32 bit int.  */
  unsigned int word;
} ieee_float_shape_type;

/* Get a 32 bit int from a float.  */

#define GET_FLOAT_WORD(i,d)                                     \
do {                                                            \
  ieee_float_shape_type gf_u;                                   \
  gf_u.value = (d);                                             \
  (i) = gf_u.word;                                              \
} while (0)

int foo(float d)
{
        int i;

        GET_FLOAT_WORD(i, d);

        return i;
}

Uses the stack to do the conversion:

foo:
        stfs 1,-16(1)
        ori 2,2,0
        lwa 3,-16(1)

LLVM does what I expect:

foo:
        xscvdpspn 0, 1
        xxsldwi 0, 0, 0, 3
        mfvsrwz 3, 0
        extsw 3, 3