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[Bug target/70442] [6 Regression] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "extract_insn"
- From: "ienkovich at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 30 Mar 2016 12:40:49 +0000
- Subject: [Bug target/70442] [6 Regression] gcc ICE at -O2 and above on valid code on x86_64-linux-gnu in "extract_insn"
- Auto-submitted: auto-generated
- References: <bug-70442-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=70442
Ilya Enkovich <ienkovich at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |ASSIGNED
Assignee|unassigned at gcc dot gnu.org |ienkovich at gcc dot gnu.org
--- Comment #2 from Ilya Enkovich <ienkovich at gcc dot gnu.org> ---
Another undefined register case in STV. Undefined registers were supported in
scalar_chain::convert_op but we don't call it for reg-reg moves. Testing this
patch:
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1639704..8c6024b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -3467,6 +3468,7 @@ scalar_chain::convert_insn (rtx_insn *insn)
break;
case REG:
+ convert_op (&src, insn);
break;
case SUBREG: