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[Bug target/69577] [5/6 Regression] wrong code with -fno-forward-propagate -mavx and 128bit arithmetics since r215450


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69577

--- Comment #6 from UroÅ Bizjak <ubizjak at gmail dot com> ---
IMO, we should revert r215450, and fix a couple of cases using narrowing
conversions with gen_lowpart that were introduced after r215450.

Something like:

--cut here--
Index: i386.c
===================================================================
--- i386.c      (revision 233041)
+++ i386.c      (working copy)
@@ -43276,7 +43276,7 @@
          be dropped leaving a plain DImode store.  This is indistinguishable
          from a "normal" DImode move, and so we're justified to use movsd,
          which modifies the entire 128-bit register.  */
-      if (to_size == UNITS_PER_WORD && from_size > UNITS_PER_WORD)
+      if (to_size < from_size)          
        return true;
     }

Index: sse.md
===================================================================
--- sse.md      (revision 233041)
+++ sse.md      (working copy)
@@ -17291,12 +17291,12 @@
    && reload_completed && GENERAL_REG_P (operands[1])"
   [(const_int 0)]
 {
-  emit_insn (gen_vec_setv4si_0 (gen_lowpart (V4SImode, operands[0]),
+  emit_insn (gen_vec_setv4si_0 (gen_rtx_REG (V4SImode, REGNO (operands[0])),
                                CONST0_RTX (V4SImode),
                                gen_lowpart (SImode, operands[1])));
   emit_insn (gen_avx2_pbroadcast<mode> (operands[0],
-                                       gen_lowpart (<ssexmmmode>mode,
-                                                    operands[0])));
+                                       gen_rtx_REG (<ssexmmmode>mode,
+                                                    REGNO (operands[0]))));
   DONE;
 })

--cut here--

Please note that sse.md uses constructs like:

    op1 = gen_rtx_REG (<ssehalfvecmode>mode, REGNO (op1));

to generate narrowing conversions involving SSE regs before the mentioned
revision.

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