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[Bug target/67378] PowerPC unrecognizable insn (ICE in in extract_insn, at recog.c:2297)
- From: "amodra at gmail dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Mon, 07 Sep 2015 06:08:03 +0000
- Subject: [Bug target/67378] PowerPC unrecognizable insn (ICE in in extract_insn, at recog.c:2297)
- Auto-submitted: auto-generated
- References: <bug-67378-4 at http dot gcc dot gnu dot org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=67378
Alan Modra <amodra at gmail dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2015-09-07
CC| |amodra at gmail dot com
Ever confirmed|0 |1
--- Comment #1 from Alan Modra <amodra at gmail dot com> ---
This is a reload issue.
Here's the insn:
(insn 13 7 487 2 (set (reg:DI 183)
(mem/u/c:DI (pre_modify:DI (reg/f:DI 262)
(plus:DI (reg/f:DI 262)
(const_int 18 [0x12]))) [0 S8 A8])) /src/tmp/pr67378.i:19
536 {*movdi_internal64}
(expr_list:REG_EQUIV (mem/u/c:DI (const:DI (plus:DI (symbol_ref:DI
("*.LANCHOR0") [flags 0x182])
(const_int 18 [0x12]))) [0 S8 A8])
(expr_list:REG_INC (reg/f:DI 262)
(nil))))
and its reloads:
Reload 0: reload_in (DI) = (reg/f:DI 262)
reload_out (DI) = (reg/f:DI 262)
BASE_REGS, RELOAD_OTHER (opnum = 1)
reload_in_reg: (reg/f:DI 262)
reload_out_reg: (reg/f:DI 262)
reload_reg_rtx: (reg:DI 8 8)
Reload 1: GENERAL_REGS, RELOAD_FOR_OPERAND_ADDRESS (opnum = 0), optional, can't
combine, secondary_reload_p
Reload 2: reload_out (DI) = (reg:DI 183)
NO_REGS, RELOAD_FOR_OUTPUT (opnum = 0), optional
reload_out_reg: (reg:DI 183)
secondary_out_reload = 1
Reload 3: BASE_REGS, RELOAD_FOR_INPUT_ADDRESS (opnum = 1), can't combine,
secondary_reload_p
reload_reg_rtx: (reg:DI 9 9)
Reload 4: reload_in (DI) = (mem/u/c:DI (pre_modify:DI (reg/f:DI 262)
(plus:DI (reg/f:DI 262)
(const_int 18
[0x12]))) [0 S8 A8])
GENERAL_REGS, RELOAD_FOR_INPUT (opnum = 1)
reload_in_reg: (mem/u/c:DI (pre_modify:DI (reg/f:DI 262)
(plus:DI (reg/f:DI 262)
(const_int 18
[0x12]))) [0 S8 A8])
reload_reg_rtx: (reg:DI 9 9)
secondary_in_reload = 3
secondary_in_icode = reload_di_load
Pseudo 162 didn't get a hard reg, so is reloaded by reload 0. The offset for
the pre_modify isn't a multiple of 4, so it needs a secondary reload, reload 4.
Where this goes wrong is that the replacements for reload 0 apply to the
original instruction, *not* the new insns emitted by the secondary reload. (We
do get one replacement accidentally via rtl sharing.)
After replacements for reload 0:
# insn emitted for reload 0
(insn 496 494 498 2 (set (reg:DI 8 8)
(reg/f:DI 262)) /src/tmp/pr67378.i:19 -1
(nil))
#insn 1 emitted by secondary reload, inside the plus is updated by rtl sharing
#reg 262 here should be replaced by reg 8
(insn 498 496 499 2 (set (reg/f:DI 262)
(plus:DI (reg:DI 8 8)
(const_int 18 [0x12]))) /src/tmp/pr67378.i:19 -1
(nil))
#insn 2 emitted by secondary reload
#reg 262 here should be replaced by reg 8
(insn 499 498 13 2 (set (reg:DI 9 9)
(mem/u/c:DI (reg/f:DI 262) [0 S8 A8])) /src/tmp/pr67378.i:19 -1
(nil))
#original insn, the mem here is replaced by reg 9 later
(insn 13 499 497 2 (set (reg:DI 183)
(mem/u/c:DI (pre_modify:DI (reg:DI 8 8)
(plus:DI (reg:DI 8 8)
(const_int 18 [0x12]))) [0 S8 A8])) /src/tmp/pr67378.i:19
536 {*movdi_internal64}
(expr_list:REG_EQUIV (mem/u/c:DI (const:DI (plus:DI (symbol_ref:DI
("*.LANCHOR0") [flags 0x182])
(const_int 18 [0x12]))) [0 S8 A8])
(expr_list:REG_INC (reg/f:DI 262)
(nil))))
#insn emitted for reload 0
(insn 497 13 487 2 (set (reg/f:DI 262)
(reg:DI 8 8)) /src/tmp/pr67378.i:19 -1
(nil))