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[Bug inline-asm/66599] on aarch64, some parameters to memory constraints causes wrong ASM generation


https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66599

--- Comment #6 from ktkachov at gcc dot gnu.org ---
(In reply to Romain Dolbeau from comment #5)
> OK thank you everyone. Not yet used to the idiosyncrasy of aarch64. Perhaps
> the explanation of the "Q" constraint should mention it's required for all
> load/store that do not support offsets, and mention ldn/stn? It would help
> newbies to aarch64 I think.

Well, it does say the first part:
"A memory address which uses a single base register with no offset"

Patches welcome for the second part :)


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