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[Bug rtl-optimization/66087] New: Invalid narrowing of MEM with containing POST_INC
- From: "schwab at linux-m68k dot org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sat, 09 May 2015 11:35:13 +0000
- Subject: [Bug rtl-optimization/66087] New: Invalid narrowing of MEM with containing POST_INC
- Auto-submitted: auto-generated
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66087
Bug ID: 66087
Summary: Invalid narrowing of MEM with containing POST_INC
Product: gcc
Version: 4.8.5
Status: UNCONFIRMED
Keywords: wrong-code
Severity: normal
Priority: P3
Component: rtl-optimization
Assignee: unassigned at gcc dot gnu.org
Reporter: schwab@linux-m68k.org
CC: law at redhat dot com
Target Milestone: ---
Target: m68k-*-*
Created attachment 35511
--> https://gcc.gnu.org/bugzilla/attachment.cgi?id=35511&action=edit
Testcase extracted from icu
With the attached test case compiled with -O2, reload is transforming
(insn 21 20 22 4 (set (reg:SI 47 [ D.1538 ])
(plus:SI (subreg:SI (mem:DI (post_inc:SI (reg:SI 41 [ ivtmp.13 ])) [1
MEM[base: _17, offset: 0B]+0 S8 A16]) 0)
(const_int -1 [0xffffffffffffffff]))) autoinc.c:4 133
{*addsi3_internal}
(expr_list:REG_INC (reg:SI 41 [ ivtmp.13 ])
(nil)))
into
(insn 40 20 21 4 (set (reg:SI 1 %d1 [orig:47 D.1538 ] [47])
(mem:SI (post_inc:SI (reg:SI 8 %a0 [orig:41 ivtmp.13 ] [41])) [1
MEM[base: _17, offset: 0B]+0 S4 A16])) autoinc.c:4 37 {*movsi_m68k}
(expr_list:REG_INC (reg:SI 8 %a0 [orig:41 ivtmp.13 ] [41])
(nil)))
without compensating for the fact that POST_INC depends on the mode of the
containing MEM wrt to the amount to increment.
The bug was introduced by the autoinc changes in r150588, but it probably just
exposed a latent bug in reload.