[Bug rtl-optimization/63659] [4.8/4.9/5 Regression] wrong code at -O2 and -O3 on x86_64-linux-gnu

["jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=63659

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Seems this is a REE bug.  Before REE pass, we have:
(insn 4 27 76 6 (set (reg/v:QI 0 ax [orig:59 k ] [59])
        (const_int -1 [0xffffffffffffffff])) pr63659.c:18 66 {*movqi_internal}
     (expr_list:REG_EQUAL (const_int -1 [0xffffffffffffffff])
        (nil)))
...
(insn 46 44 80 9 (set (reg:SI 0 ax [orig:85 f.10 ] [85])
        (zero_extend:SI (reg/v:QI 0 ax [orig:59 k ] [59]))) pr63659.c:20 118
{*zero_extendqisi2}
     (nil))
...
(insn 47 80 48 9 (set (mem:SI (reg/f:DI 1 dx [orig:84 d ] [84]) [3 *d.11_19+0
S4 A32])
        (reg:SI 0 ax [orig:85 f.10 ] [85])) pr63659.c:20 64 {*movsi_internal}
     (nil))
REE changes that to:
(insn 4 27 76 6 (set (reg:SI 0 ax)
        (const_int 255 [0xff])) pr63659.c:18 64 {*movsi_internal}
     (expr_list:REG_EQUAL (const_int -1 [0xffffffffffffffff])
        (nil)))
...
(insn 47 80 48 9 (set (mem:SI (reg/f:DI 1 dx [orig:84 d ] [84]) [3 *d.11_19+0
S4 A32])
        (reg:SI 0 ax [orig:85 f.10 ] [85])) pr63659.c:20 64 {*movsi_internal}
     (nil))
and there is a (set (reg:SI 0 ax) (const_int -1)) insn in another block.
CSA pass then hoists (set (reg:SI 0 ax) (const_int -1)) before the loop.
The bug is that the REE pass left an invalid REG_EQUAL note which the CSA pass
then used.  0xff value is -1 in QImode, but not after zero-extension.
So I think we'll need to teach the REE pass to adjust or drop
REG_EQUAL/REG_EQUIV notes.