[Bug target/62262] aarch64 gcc generates invalid assembler

["carrot at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62262

--- Comment #9 from amker at gcc dot gnu.org ---
(In reply to Andrew Pinski from comment #6)
> (In reply to Carrot from comment #5)
> > Actually the original source code is guarded by assert, and the parameter
> > passed to CLZ can be guaranteed not 0, so "value <<= zeros" is well defined
> > in our original source code.
> 
> The issue is the second CLZ (not the first one).  Though if I read the code
> correctly value<<1 can never be zero but GCC does not optimize away that
> check.

How is that?  Both "value >> bias" and "value << 1" are zero if value == 1 at
the entry, am I misunderstanding?

--- Comment #10 from carrot at gcc dot gnu.org ---
Author: carrot
Date: Wed Aug 27 16:48:09 2014
New Revision: 214578

URL: https://gcc.gnu.org/viewcvs?rev=214578&root=gcc&view=rev
Log:
    PR target/62262
    * config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Check the shift
    amount before using it.

    * gcc.target/aarch64/pr62262.c: New test.


Added:
    trunk/gcc/testsuite/gcc.target/aarch64/pr62262.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/aarch64/aarch64.md
    trunk/gcc/testsuite/ChangeLog