[Bug rtl-optimization/61801] sched2 miscompiles syscall sequence with -g

["rguenth at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61801

--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
;;   --- Region Dependences --- b 12 bb 0 
;;      insn  code    bb   dep  prio  cost   reservation
;;      ----  ----    --   ---  ----  ----   -----------
...
;;      239    90    12     1     5     1  
athlon-direct,athlon-agu,athlon-store       : 127 123n 122nm 240 
...
;;      122    -1    12     7     0     0   nothing     : 124 123nm 243 216m 
;;      216    90    12     0     5     3   athlon-direct,athlon-load   : 127
123nm 243 
...

which maps to:

(insn 239 116 240 12 (set (mem/c:SI (reg/f:SI 7 sp) [11 %sfp+-16 S4 A32])
        (reg:SI 0 ax [orig:127 cmdp_14(D)->syscall_no ] [127]))
bug-887141_pthread_create.1.min.i:77 90 {*movsi_internal}
     (expr_list:REG_DEAD (reg:SI 0 ax [orig:127 cmdp_14(D)->syscall_no ] [127])
        (nil)))
...
(debug_insn 122 120 216 12 (var_location:SI resultvar (asm_operands/v:SI
("xchgl %%ebx, %%edi
        int $0x80
        xchgl %%edi, %%ebx
        ") ("=a") 0 [
            (mem/c:SI (reg/f:SI 7 sp) [11 %sfp+-16 S4 A32])
            (reg:SI 5 di [orig:128 cmdp_14(D)->id ] [128])
            (reg:SI 2 cx [orig:129 cmdp_14(D)->id+4 ] [129])
            (reg:SI 1 dx [orig:130 cmdp_14(D)->id+8 ] [130])
        ]
         [
            (asm_input:SI ("0") bug-887141_pthread_create.1.min.i:77)
            (asm_input:SI ("D") bug-887141_pthread_create.1.min.i:77)
            (asm_input:SI ("c") bug-887141_pthread_create.1.min.i:77)
            (asm_input:SI ("d") bug-887141_pthread_create.1.min.i:77)
        ]
         [] bug-887141_pthread_create.1.min.i:77))
bug-887141_pthread_create.1.min.i:77 -1
     (nil))
(insn 216 122 243 12 (set (reg/v:SI 4 si [orig:84 result ] [84])
        (mem/c:SI (reg/f:SI 7 sp) [11 %sfp+-16 S4 A32]))
bug-887141_pthread_create.1.min.i:77 90 {*movsi_internal}
     (nil))

insn 123 is the real asm.  Not sure if the dependence of 239 via 122 to 216
is supposed to prevent scheduling 216 before 239.  If so, then dependence
information is correct.  The only forward dependence to 216 is really from
the debug insn.

But then:

;;              dependencies resolved: insn 238
;;              tick updated: insn 238 into ready
;;              dependencies resolved: insn 216
;;              tick updated: insn 216 into ready
;;      Advanced a state.
;;              Ready list after queue_to_ready:  216:67:prio=5  238:59:prio=11

what?  216 is already ready?

;;      Ready list (t =   0):    216:67:prio=5  238:59:prio=11
;;        0--> b  0: i 238 ax=[sp+0x30]                           
:athlon-direct,athlon-load
;;              dependencies resolved: insn 116
;;              Ready-->Q: insn 116: queued for 3 cycles (change queue index).
;;              tick updated: insn 116 into queue with cost=3
;;              Ready list after ready_sort:      216:67:prio=5
;;      Ready list (t =   0):    216:67:prio=5
;;        0--> b  0: i 216 si=[sp]                                
:athlon-direct,athlon-load
;;              resetting: debug insn 122

yeah, so we reset the debug insn.  But ignored the indirect dependence from
239.

Now, of course I'm lost in the scheduler code, not knowing how it is intended
to work with debug-insns.

As a band-aid fix I'd simply never generate debug_insns with asms ...