[Bug target/61202] New: gcc generates invalid sqdmulh instruction

["carrot at google dot com" <gcc-bugzilla at gcc dot gnu dot org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61202

            Bug ID: 61202
           Summary: gcc generates invalid sqdmulh instruction
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: carrot at google dot com
            Target: aarch64

Created attachment 32808
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=32808&action=edit
testcase

Attached is reduced preprocessed source code. Compile it with gcc 4.9

aarchobj/gcc/cc1 -fpreprocessed t3.i -quiet -dumpbase t3.i -mlittle-endian
"-mabi=lp64" -auxbase-strip t3.o -Os -o t3.s
as -o t3.o t3.s
t3.s: Assembler messages:
t3.s:14: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh
v4.8h,v0.8h,v16.h[0]'
t3.s:42: Error: register number out of range 0 to 15 at operand 3 -- `sqdmulh
v0.8h,v1.8h,v16.h[0]'


The error message is very clear, the last operand of sqdmulh can only be low FP
register.