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[Bug middle-end/60102] powerpc fp-bit ices at dwf_regno
- From: "cesar at codesourcery dot com" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Thu, 01 May 2014 15:21:58 +0000
- Subject: [Bug middle-end/60102] powerpc fp-bit ices at dwf_regno
- Auto-submitted: auto-generated
- References: <bug-60102-4 at http dot gcc dot gnu dot org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60102
Cesar Philippidis <cesar at codesourcery dot com> changed:
What |Removed |Added
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CC| |cesar at codesourcery dot com
--- Comment #6 from Cesar Philippidis <cesar at codesourcery dot com> ---
I've found a similar problem with dwf_regno() when I tried to bootstrap a
ppc-eabispe compiler. The problem there is the register aliasing of r0 between
32 and 64-bit modes. The rs6000 backend uses pseudo registers to disambiguate
those two usages.
I've posted a patch here
<http://gcc.gnu.org/ml/gcc-patches/2014-04/msg02064.html>, but it hasn't been
reviewed yet.