[Bug rtl-optimization/60856] New: GCC4.9 inline-asm has wrong register allocation for MIPS64r2

["qiuji at loongson dot cn" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60856

            Bug ID: 60856
           Summary: GCC4.9 inline-asm has wrong register allocation for
                    MIPS64r2
           Product: gcc
           Version: 4.9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: qiuji at loongson dot cn

Created attachment 32612
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=32612&action=edit
preprocessed file of the wrong case

In test.c piece of inline assemmble instructions are written to work as the c
code above them.
the C code is :

    if (a < b) {
        x = a;
        y = b - a + 1;
    } else {
        x = b;
        y = a - b + 1;
    }

the inline asm is:

    asm(
        " .set mips64r2 \r\n"
        " .set noreorder \r\n"
        " slt $8, %2, %3 \r\n" 
        " move %0, %2 \r\n" 
        " sub $9, %3, %2 \r\n" 
        " addi %1,$9, 1 \r\n"
        " movz %0, %3, $8 \r\n"
        " sub $10, %2, %3 \r\n" 
        " addi $10, 1 \r\n" 
        " movz %1, $10, $8 \r\n" 
        " .set reorder \r\n"
        :"=r"(x), "=r"(y)
        :"r"(a), "r"(b)
        :"$8","$9", "$10"
    );

And the final code I got from the GCC4.9 in the .s file is:

 .set mips64r2 
 .set noreorder 
 slt $8, $2, $3 
 move $4, $2 
 sub $9, $3, $2 
 addi $3,$9, 1 
 movz $4, $3, $8 
 sub $10, $2, $3 
 addi $10, 1 
 movz $3, $10, $8 
 .set reorder 

the "r"(b) variable is allocated to $3 while "=r"(y) variable is also allocated
to $3. That makes wrong result.