[Bug target/59163] [4.8/4.9 Regression] program compiled with g++ -O3 segfaults

["jakub at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59163

--- Comment #16 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Note that (according to my reading of the docs) e.g. movlps/movhps don't allow
unaligned memory, so blindly allow any combine is wrong, but while the MEM
operand in those cases is say V4SFmode, the loads or stores can have V2SFmode's
alignment.  So, I don't see how ssemovu type would help us here, I think we
handle all the completely unaligned loads/stores already (after the
UNSPEC_LDDQU addition).  But we need some way how to determine for which
instructions we should require only smaller alignment, plus tweak the two
gen_rtx_MEM spots for the builtins and set mode there according to
get_pointer_alignment and/or to assumed alignment of the builtins.