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[Bug middle-end/49207] Instruction scheduling error in GCC mips cross-compiler
- From: "pinskia at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Sun, 10 Nov 2013 05:33:56 +0000
- Subject: [Bug middle-end/49207] Instruction scheduling error in GCC mips cross-compiler
- Auto-submitted: auto-generated
- References: <bug-49207-4 at http dot gcc dot gnu dot org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=49207
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Component|c |middle-end
Resolution|--- |INVALID
--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to hanib from comment #4)
> (In reply to comment #3)
> > I think you have an aliasing problem in your code.
>
> The code I am compiling is the Perlbench benchmark from SPEC-CPU2006. If I
> compile the code for an Intel machine using -O2 there is no problem. This
> problem only appears when I use the GCC MIPS cross-compiler with the -O2
> switch. I also traced through the code and the sequence of these two
> instructions should be reversed.
Perl in SPEC CPU 2006 has known aliasing bugs in it; just use
-fno-strict-aliasing.