[Bug target/58673] ICE in final_scan_insn for movti_ppc64 with base+offset address

["meissner at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58673

--- Comment #5 from Michael Meissner <meissner at gcc dot gnu.org> ---
Author: meissner
Date: Thu Oct 17 17:06:24 2013
New Revision: 203781

URL: http://gcc.gnu.org/viewcvs?rev=203781&root=gcc&view=rev
Log:
[gcc]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/58673
    * config/rs6000/rs6000.c (rs6000_legitimate_address_p): Only
    restrict TImode addresses to single indirect registers if both
    -mquad-memory and -mvsx-timode are used.
    (rs6000_output_move_128bit): Use quad_load_store_p to determine if
    we should emit load/store quad.  Remove using %y for quad memory
    addresses.

    * config/rs6000/rs6000.md (mov<mode>_ppc64, TI/PTImode): Add
    constraints to allow load/store quad on machines where TImode is
    not allowed in VSX registers.  Use 'n' instead of 'F' constraint
    for TImode to load integer constants.

[gcc/testsuite]
2013-10-17  Michael Meissner  <meissner@linux.vnet.ibm.com>

    PR target/58673
    * gcc.target/powerpc/pr58673-1.c: New file to test whether
    -mquad-word + -mno-vsx-timode causes errors.
    * gcc.target/powerpc/pr58673-2.c: Likewise.



Added:
    trunk/gcc/testsuite/gcc.target/powerpc/pr58673-1.c
    trunk/gcc/testsuite/gcc.target/powerpc/pr58673-2.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/rs6000/rs6000.c
    trunk/gcc/config/rs6000/rs6000.md