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[Bug middle-end/55921] [4.6/4.7 Regression] Crash in verify_ssa for asm to side-steps complex pessimization
- From: "danglin at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Wed, 30 Jan 2013 02:56:52 +0000
- Subject: [Bug middle-end/55921] [4.6/4.7 Regression] Crash in verify_ssa for asm to side-steps complex pessimization
- Auto-submitted: auto-generated
- References: <bug-55921-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55921
--- Comment #9 from John David Anglin <danglin at gcc dot gnu.org> 2013-01-30 02:56:52 UTC ---
Return NULL_RTX in extract_bit_field_using_extv when it's not
possible to create pseudos just results in another similar error
a little further down the road:
#0 gen_reg_rtx (mode=DImode) at ../../gcc/gcc/emit-rtl.c:866
#1 0x40000000006242f4 in maybe_legitimize_operand (op=0x800003fffdff1ff8,
opno=0, icode=CODE_FOR_lshrdi3) at ../../gcc/gcc/optabs.c:8055
#2 maybe_legitimize_operands (icode=CODE_FOR_lshrdi3, opno=0, nops=3,
ops=<optimized out>) at ../../gcc/gcc/optabs.c:8128
#3 0x40000000006245a4 in maybe_gen_insn (icode=CODE_FOR_lshrdi3,
nops=<optimized out>, ops=0x800003fffdff1ff8)
at ../../gcc/gcc/optabs.c:8146
#4 0x400000000062c9c4 in expand_binop_directly (mode=DImode,
binoptab=lshr_optab, op0=0x800003fffdebc260, op1=0x800003fffddbc670,
target=0x0, unsignedp=1, methods=OPTAB_DIRECT, last=0x0)
at ../../gcc/gcc/optabs.c:1450
#5 0x4000000000626370 in expand_binop (mode=DImode, binoptab=lshr_optab,
op0=0x800003fffdebc260, op1=0x800003fffddbc670, target=0x0, unsignedp=1,
methods=OPTAB_DIRECT) at ../../gcc/gcc/optabs.c:1519
#6 0x400000000042e3bc in expand_shift_1 (code=RROTATE_EXPR, mode=BLKmode,
shifted=0x3e, amount=<optimized out>, target=0x0, unsignedp=-35928464)
at ../../gcc/gcc/expmed.c:2210
#7 0x400000000043112c in expand_shift (code=RSHIFT_EXPR, mode=DImode,
shifted=<optimized out>, amount=<optimized out>, target=<optimized out>,
unsignedp=1) at ../../gcc/gcc/expmed.c:2254
#8 0x4000000000431688 in extract_fixed_bit_field (tmode=SImode,
op0=0x800003fffdebc260, bitsize=32, bitnum=32, target=0x0, unsignedp=1,
packedp=<optimized out>) at ../../gcc/gcc/expmed.c:1790
#9 0x40000000004322f4 in extract_bit_field_1 (str_rtx=<optimized out>,
bitsize=1, bitnum=32, unsignedp=1, packedp=<optimized out>, target=0x7,
mode=64, tmode=<optimized out>, fallback_p=false)
at ../../gcc/gcc/expmed.c:1635
After ira, we have the following insns:
(insn 26 25 27 2 (set (reg:SC 85 [ cf ]) (asm_operands:SC ("") ("=r") 0
[
(reg:DI 72 [ D.1406 ])
]
[
(asm_input:DI ("r") :0) ]
[]
/test/gnu/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/pr55921.c:
17)) /test/gnu/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/pr55921.c:17 -1
(expr_list:REG_DEAD (reg:DI 72 [ D.1406 ])
(nil)))
(insn 27 26 29 2 (set (reg:DI 86)
(subreg:DI (reg:SC 85 [ cf ]) 0))
/test/gnu/gcc/gcc/gcc/testsuite/gcc.c-
torture/compile/pr55921.c:17 121 {*pa.md:4189}
(nil))
It seems insn 27 needs to expanded before reload as extraction of the SUBREG
needs an intermediate general register.