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[Bug rtl-optimization/55686] [4.8 Regression] ICE in assign_by_spills, at lra-assigns.c:1244
- From: "vmakarov at gcc dot gnu.org" <gcc-bugzilla at gcc dot gnu dot org>
- To: gcc-bugs at gcc dot gnu dot org
- Date: Fri, 14 Dec 2012 15:12:31 +0000
- Subject: [Bug rtl-optimization/55686] [4.8 Regression] ICE in assign_by_spills, at lra-assigns.c:1244
- Auto-submitted: auto-generated
- References: <bug-55686-4@http.gcc.gnu.org/bugzilla/>
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55686
--- Comment #5 from Vladimir Makarov <vmakarov at gcc dot gnu.org> 2012-12-14 15:12:31 UTC ---
Yes, Jakub is right. All 4 tests presented here ICE in reload pass too with
`unable to find a register to spill in class âDIREGâ`.
I think I could fix it in LRA as it has a code for hard reg live range
splitting but I think we should fix the reason (first change in GCC code)
resulted in the ICE as all other targets use reload and they might have the
same bug.